source: mainline/arch/amd64/src/interrupt.c@ 74b22cc5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 74b22cc5 was 74b22cc5, checked in by Ondrej Palkovsky <ondrap@…>, 19 years ago

Let mouse work on amd64 too.

  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <symtab.h>
47#include <arch/asm.h>
48#include <proc/scheduler.h>
49#include <proc/thread.h>
50#include <proc/task.h>
51#include <synch/spinlock.h>
52#include <arch/ddi/ddi.h>
53#include <interrupt.h>
54#include <ipc/irq.h>
55
56void print_info_errcode(int n, istate_t *istate)
57{
58 char *symbol;
59/* __u64 *x = &istate->stack[0]; */
60
61 if (!(symbol=get_symtab_entry(istate->rip)))
62 symbol = "";
63
64 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n, __FUNCTION__);
65 printf("%%rip: %#llX (%s)\n",istate->rip, symbol);
66 printf("ERROR_WORD=%#llX\n", istate->error_word);
67 printf("%%rcs=%#llX, flags=%#llX, %%cr0=%#llX\n", istate->cs, istate->rflags,read_cr0());
68 printf("%%rax=%#llX, %%rcx=%#llX, %%rdx=%#llX\n",istate->rax,istate->rcx,istate->rdx);
69 printf("%%rsi=%#llX, %%rdi=%#llX, %%r8 =%#llX\n",istate->rsi,istate->rdi,istate->r8);
70 printf("%%r9 =%#llX, %%r10 =%#llX, %%r11=%#llX\n",istate->r9,istate->r10,istate->r11);
71#ifdef CONFIG_DEBUG_ALLREGS
72 printf("%%r12=%#llX, %%r13=%#llX, %%r14=%#llX\n",istate->r12,istate->r13,istate->r14);
73 printf("%%r15=%#llX, %%rbx=%#llX, %%rbp=%#llX\n",istate->r15,istate->rbx,&istate->rbp);
74#endif
75 printf("%%rsp=%#llX\n",&istate->stack[0]);
76}
77
78/*
79 * Interrupt and exception dispatching.
80 */
81
82void (* disable_irqs_function)(__u16 irqmask) = NULL;
83void (* enable_irqs_function)(__u16 irqmask) = NULL;
84void (* eoi_function)(void) = NULL;
85
86void null_interrupt(int n, istate_t *istate)
87{
88 fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
89 print_info_errcode(n, istate);
90 panic("unserviced interrupt\n");
91}
92
93/** General Protection Fault. */
94void gp_fault(int n, istate_t *istate)
95{
96 if (TASK) {
97 count_t ver;
98
99 spinlock_lock(&TASK->lock);
100 ver = TASK->arch.iomapver;
101 spinlock_unlock(&TASK->lock);
102
103 if (CPU->arch.iomapver_copy != ver) {
104 /*
105 * This fault can be caused by an early access
106 * to I/O port because of an out-dated
107 * I/O Permission bitmap installed on CPU.
108 * Install the fresh copy and restart
109 * the instruction.
110 */
111 io_perm_bitmap_install();
112 return;
113 }
114 fault_if_from_uspace(istate, "general protection fault");
115 }
116
117 print_info_errcode(n, istate);
118 panic("general protection fault\n");
119}
120
121void ss_fault(int n, istate_t *istate)
122{
123 fault_if_from_uspace(istate, "stack fault");
124 print_info_errcode(n, istate);
125 panic("stack fault\n");
126}
127
128void nm_fault(int n, istate_t *istate)
129{
130#ifdef CONFIG_FPU_LAZY
131 scheduler_fpu_lazy_request();
132#else
133 fault_if_from_uspace(istate, "fpu fault");
134 panic("fpu fault");
135#endif
136}
137
138void tlb_shootdown_ipi(int n, istate_t *istate)
139{
140 trap_virtual_eoi();
141 tlb_shootdown_ipi_recv();
142}
143
144void trap_virtual_enable_irqs(__u16 irqmask)
145{
146 if (enable_irqs_function)
147 enable_irqs_function(irqmask);
148 else
149 panic("no enable_irqs_function\n");
150}
151
152void trap_virtual_disable_irqs(__u16 irqmask)
153{
154 if (disable_irqs_function)
155 disable_irqs_function(irqmask);
156 else
157 panic("no disable_irqs_function\n");
158}
159
160void trap_virtual_eoi(void)
161{
162 if (eoi_function)
163 eoi_function();
164 else
165 panic("no eoi_function\n");
166
167}
168
169static void ipc_int(int n, istate_t *istate)
170{
171 ipc_irq_send_notif(n-IVT_IRQBASE);
172 trap_virtual_eoi();
173}
174
175
176/* Reregister irq to be IPC-ready */
177void irq_ipc_bind_arch(__native irq)
178{
179 if (irq == IRQ_CLK)
180 return;
181 exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int);
182 trap_virtual_enable_irqs(1 << irq);
183}
184
185 /** @}
186 */
187
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