source: mainline/arch/amd64/src/interrupt.c@ 3396f59

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3396f59 was 3396f59, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Fixed gdtr naming issues after ia32 changes.
Fixed stack alignment on new thread to by multiple of 16,
we are now ABI-correct and we do not #GP on va_arg to boot.
Fixed bad exception register names reporting.
Fixed bad _hardcoded_load_addr, which caused allocation of kernel text
frames.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
30#include <print.h>
31#include <debug.h>
32#include <panic.h>
33#include <arch/i8259.h>
34#include <func.h>
35#include <cpu.h>
36#include <arch/asm.h>
37#include <mm/tlb.h>
38#include <arch.h>
39#include <symtab.h>
40#include <arch/asm.h>
41
42#define PRINT_INFO_ERRCODE(n,x) { \
43 char *symbol = get_symtab_entry(stack[1]); \
44 if (!symbol) \
45 symbol = ""; \
46 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \
47 printf("%%rip: %Q (%s)\n",x[1],symbol); \
48 printf("ERROR_WORD=%Q\n", x[0]); \
49 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", x[2], x[3],read_cr0()); \
50 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",x[-2],x[-3],x[-4]); \
51 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",x[-5],x[-6],x[-7]); \
52 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",x[-8],x[-9],x[-10]); \
53 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",x[-11],x[-12],x[-13]); \
54 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",x[-14],x[-15],x); \
55 printf("%%rbp=%Q\n",x[-1]); \
56 printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]); \
57 printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]); \
58 printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]); \
59 printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]); \
60 printf(" %Q, %Q, %Q\n", x[17], x[18], x[19]); \
61 printf(" %Q, %Q, %Q\n", x[20], x[21], x[22]); \
62 printf(" %Q, %Q, %Q\n", x[23], x[24], x[25]); \
63 }
64
65/*
66 * Interrupt and exception dispatching.
67 */
68
69static iroutine ivt[IVT_ITEMS];
70
71void (* disable_irqs_function)(__u16 irqmask) = NULL;
72void (* enable_irqs_function)(__u16 irqmask) = NULL;
73void (* eoi_function)(void) = NULL;
74
75iroutine trap_register(__u8 n, iroutine f)
76{
77 ASSERT(n < IVT_ITEMS);
78
79 iroutine old;
80
81 old = ivt[n];
82 ivt[n] = f;
83
84 return old;
85}
86
87/*
88 * Called directly from the assembler code.
89 * CPU is cpu_priority_high().
90 */
91void trap_dispatcher(__u8 n, __native stack[])
92{
93 ASSERT(n < IVT_ITEMS);
94
95 ivt[n](n, stack);
96}
97
98void null_interrupt(__u8 n, __native stack[])
99{
100 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \
101 printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
102 panic("unserviced interrupt\n");
103}
104
105void gp_fault(__u8 n, __native stack[])
106{
107 PRINT_INFO_ERRCODE(n,stack);
108 panic("general protection fault\n");
109}
110
111void ss_fault(__u8 n, __native stack[])
112{
113 PRINT_INFO_ERRCODE(n,stack);
114 panic("stack fault\n");
115}
116
117
118void nm_fault(__u8 n, __native stack[])
119{
120 reset_TS_flag();
121 if (CPU->fpu_owner != NULL) {
122 fpu_lazy_context_save(&CPU->fpu_owner->saved_fpu_context);
123 /* don't prevent migration */
124 CPU->fpu_owner->fpu_context_engaged=0;
125 }
126 if (THREAD->fpu_context_exists)
127 fpu_lazy_context_restore(&THREAD->saved_fpu_context);
128 else {
129 fpu_init();
130 THREAD->fpu_context_exists=1;
131 }
132 CPU->fpu_owner=THREAD;
133}
134
135
136
137void page_fault(__u8 n, __native stack[])
138{
139 PRINT_INFO_ERRCODE(n,stack);
140 printf("Page fault address: %Q\n", read_cr2());
141 panic("page fault\n");
142}
143
144void syscall(__u8 n, __native stack[])
145{
146 printf("cpu%d: syscall\n", CPU->id);
147 thread_usleep(1000);
148}
149
150void tlb_shootdown_ipi(__u8 n, __native stack[])
151{
152 trap_virtual_eoi();
153 tlb_shootdown_ipi_recv();
154}
155
156void wakeup_ipi(__u8 n, __native stack[])
157{
158 trap_virtual_eoi();
159}
160
161void trap_virtual_enable_irqs(__u16 irqmask)
162{
163 if (enable_irqs_function)
164 enable_irqs_function(irqmask);
165 else
166 panic("no enable_irqs_function\n");
167}
168
169void trap_virtual_disable_irqs(__u16 irqmask)
170{
171 if (disable_irqs_function)
172 disable_irqs_function(irqmask);
173 else
174 panic("no disable_irqs_function\n");
175}
176
177void trap_virtual_eoi(void)
178{
179 if (eoi_function)
180 eoi_function();
181 else
182 panic("no eoi_function\n");
183
184}
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