source: mainline/arch/amd64/src/interrupt.c@ 1084a784

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1084a784 was 1084a784, checked in by Jakub Jermar <jakub@…>, 20 years ago

mips32 memory management work.
TLB Refill Exception implemented (passed basic testing).
Remove bit g from struct entry_hi.
Add generic find_mapping().
Add asid to vm_t type, define asid_t to hide architecture specific differences.
Implement ASID allocation for mips32, dummy for other architectures.
Add THE→vm (a.k.a. VM).
Add vm_install_arch().
Move pte_t definition to arch/types.h on each architecture.
Fix PTL manipulating functions on mips32 to shift pfn by 12 instead of by 14.
Fix tlb_init_arch() to initialize all entries.

Other.
Remove unnecessary header files from arch.h
Add missing headers here and there.
Remove two unnecessary ld flags from mips32 makefile.

  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
30#include <print.h>
31#include <debug.h>
32#include <panic.h>
33#include <arch/i8259.h>
34#include <func.h>
35#include <cpu.h>
36#include <arch/asm.h>
37#include <mm/tlb.h>
38#include <arch.h>
39#include <symtab.h>
40#include <arch/asm.h>
41#include <proc/scheduler.h>
42#include <proc/thread.h>
43
44
45static void messy_stack_trace(__native *stack)
46{
47 __native *upper_limit = (__native *)(((__native)get_stack_base()) + STACK_SIZE);
48 char *symbol;
49
50 printf("Stack contents: ");
51 while (stack < upper_limit) {
52 symbol = get_symtab_entry((__address)*stack);
53 if (symbol)
54 printf("%s, ", symbol);
55 stack++;
56 }
57 printf("\n");
58}
59
60static void print_info_errcode(__u8 n, __native x[])
61{
62 char *symbol;
63
64 if (!(symbol=get_symtab_entry(x[1])))
65 symbol = "";
66
67 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__);
68 printf("%%rip: %Q (%s)\n",x[1],symbol);
69 printf("ERROR_WORD=%Q\n", x[0]);
70 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", x[2], x[3],read_cr0());
71 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",x[-2],x[-3],x[-4]);
72 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",x[-5],x[-6],x[-7]);
73 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",x[-8],x[-9],x[-10]);
74 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",x[-11],x[-12],x[-13]);
75 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",x[-14],x[-15],x);
76 printf("%%rbp=%Q\n",x[-1]);
77 printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]);
78 printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]);
79 printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]);
80 printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]);
81 printf(" %Q, %Q, %Q\n", x[17], x[18], x[19]);
82 printf(" %Q, %Q, %Q\n", x[20], x[21], x[22]);
83 printf(" %Q, %Q, %Q\n", x[23], x[24], x[25]);
84 messy_stack_trace(&x[5]);
85}
86
87/*
88 * Interrupt and exception dispatching.
89 */
90
91static iroutine ivt[IVT_ITEMS];
92
93void (* disable_irqs_function)(__u16 irqmask) = NULL;
94void (* enable_irqs_function)(__u16 irqmask) = NULL;
95void (* eoi_function)(void) = NULL;
96
97iroutine trap_register(__u8 n, iroutine f)
98{
99 ASSERT(n < IVT_ITEMS);
100
101 iroutine old;
102
103 old = ivt[n];
104 ivt[n] = f;
105
106 return old;
107}
108
109/*
110 * Called directly from the assembler code.
111 * CPU is cpu_priority_high().
112 */
113void trap_dispatcher(__u8 n, __native stack[])
114{
115 ASSERT(n < IVT_ITEMS);
116
117 ivt[n](n, stack);
118}
119
120void null_interrupt(__u8 n, __native stack[])
121{
122 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \
123 printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
124 panic("unserviced interrupt\n");
125}
126
127void gp_fault(__u8 n, __native stack[])
128{
129 print_info_errcode(n,stack);
130 panic("general protection fault\n");
131}
132
133void ss_fault(__u8 n, __native stack[])
134{
135 print_info_errcode(n,stack);
136 panic("stack fault\n");
137}
138
139
140void nm_fault(__u8 n, __native stack[])
141{
142#ifdef FPU_LAZY
143 scheduler_fpu_lazy_request();
144#else
145 panic("fpu fault");
146#endif
147}
148
149
150
151void page_fault(__u8 n, __native stack[])
152{
153 print_info_errcode(n,stack);
154 printf("Page fault address: %Q\n", read_cr2());
155 panic("page fault\n");
156}
157
158void syscall(__u8 n, __native stack[])
159{
160 printf("cpu%d: syscall\n", CPU->id);
161 thread_usleep(1000);
162}
163
164void tlb_shootdown_ipi(__u8 n, __native stack[])
165{
166 trap_virtual_eoi();
167 tlb_shootdown_ipi_recv();
168}
169
170void wakeup_ipi(__u8 n, __native stack[])
171{
172 trap_virtual_eoi();
173}
174
175void trap_virtual_enable_irqs(__u16 irqmask)
176{
177 if (enable_irqs_function)
178 enable_irqs_function(irqmask);
179 else
180 panic("no enable_irqs_function\n");
181}
182
183void trap_virtual_disable_irqs(__u16 irqmask)
184{
185 if (disable_irqs_function)
186 disable_irqs_function(irqmask);
187 else
188 panic("no disable_irqs_function\n");
189}
190
191void trap_virtual_eoi(void)
192{
193 if (eoi_function)
194 eoi_function();
195 else
196 panic("no eoi_function\n");
197
198}
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