source: mainline/arch/amd64/src/ddi/ddi.c@ 874621f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 874621f was 738ad2e, checked in by Ondrej Palkovsky <ondrap@…>, 19 years ago

Changed interrupt_control to preemption_control.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*
2 * Copyright (C) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <ddi/ddi.h>
30#include <arch/ddi/ddi.h>
31#include <proc/task.h>
32#include <arch/types.h>
33#include <typedefs.h>
34#include <adt/bitmap.h>
35#include <mm/slab.h>
36#include <arch/pm.h>
37#include <errno.h>
38#include <arch/cpu.h>
39#include <arch.h>
40#include <align.h>
41
42/** Enable I/O space range for task.
43 *
44 * Interrupts are disabled and task is locked.
45 *
46 * @param task Task.
47 * @param ioaddr Startign I/O space address.
48 * @param size Size of the enabled I/O range.
49 *
50 * @return 0 on success or an error code from errno.h.
51 */
52int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
53{
54 count_t bits;
55
56 bits = ioaddr + size;
57 if (bits > IO_PORTS)
58 return ENOENT;
59
60 if (task->arch.iomap.bits < bits) {
61 bitmap_t oldiomap;
62 __u8 *newmap;
63
64 /*
65 * The I/O permission bitmap is too small and needs to be grown.
66 */
67
68 newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
69 if (!newmap)
70 return ENOMEM;
71
72 bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
73 bitmap_initialize(&task->arch.iomap, newmap, bits);
74
75 /*
76 * Mark the new range inaccessible.
77 */
78 bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
79
80 /*
81 * In case there really existed smaller iomap,
82 * copy its contents and deallocate it.
83 */
84 if (oldiomap.bits) {
85 bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
86 free(oldiomap.map);
87 }
88 }
89
90 /*
91 * Enable the range and we are done.
92 */
93 bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
94
95 /*
96 * Increment I/O Permission bitmap generation counter.
97 */
98 task->arch.iomapver++;
99
100 return 0;
101}
102
103/** Install I/O Permission bitmap.
104 *
105 * Current task's I/O permission bitmap, if any, is installed
106 * in the current CPU's TSS.
107 *
108 * Interrupts must be disabled prior this call.
109 */
110void io_perm_bitmap_install(void)
111{
112 count_t bits;
113 ptr_16_64_t cpugdtr;
114 descriptor_t *gdt_p;
115 tss_descriptor_t *tss_desc;
116 count_t ver;
117
118 /* First, copy the I/O Permission Bitmap. */
119 spinlock_lock(&TASK->lock);
120 ver = TASK->arch.iomapver;
121 if ((bits = TASK->arch.iomap.bits)) {
122 bitmap_t iomap;
123
124 ASSERT(TASK->arch.iomap.map);
125 bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
126 bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
127 /*
128 * It is safe to set the trailing eight bits because of the extra
129 * convenience byte in TSS_IOMAP_SIZE.
130 */
131 bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
132 }
133 spinlock_unlock(&TASK->lock);
134
135 /*
136 * Second, adjust TSS segment limit.
137 * Take the extra ending byte will all bits set into account.
138 */
139 gdtr_store(&cpugdtr);
140 gdt_p = (descriptor_t *) cpugdtr.base;
141 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
142 gdtr_load(&cpugdtr);
143
144 /*
145 * Before we load new TSS limit, the current TSS descriptor
146 * type must be changed to describe inactive TSS.
147 */
148 tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
149 tss_desc->type = AR_TSS;
150 tr_load(gdtselector(TSS_DES));
151
152 /*
153 * Update the generation count so that faults caused by
154 * early accesses can be serviced.
155 */
156 CPU->arch.iomapver_copy = ver;
157}
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