source: mainline/arch/amd64/src/boot/boot.S@ 345ce2f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 345ce2f was 89344d85, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Changes, that were needed to make it work on Bochs.

  • We CAN use the NX bit in paging tables, but we have

to initialize the NXE bit in EFER register first.

  • Property mode set to 100644
File size: 4.6 KB
Line 
1#
2# Copyright (C) 2001-2004 Ondrej Palkovsky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#define __ASM__
30
31#include <arch/mm/page.h>
32#include <arch/mm/ptl.h>
33#include <arch/pm.h>
34#include <arch/cpu.h>
35
36#define START_STACK 0x7c00
37#define START_STACK_64 0xffffffff80007c00
38
39#
40# This is where we require any SPARTAN-kernel-compatible boot loader
41# to pass control in real mode.
42#
43# Protected mode tables are statically initialised during compile
44# time. So we can just load the respective table registers and
45# switch to protected mode.
46#
47.section K_TEXT_START
48.code16
49.global kernel_image_start
50kernel_image_start:
51 cli
52 xorw %ax,%ax
53 movw %ax,%ds
54 movw %ax,%ss # initialize stack segment register
55 movl $(START_STACK),%esp # initialize stack pointer
56
57 call memmap_arch_init
58
59 movl $0x80000000, %eax
60 cpuid
61 cmp $0x80000000, %eax # any function > 80000000h?
62 jbe no_long_mode
63 movl $0x80000001, %eax # Extended function code 80000001
64 cpuid
65 bt $29, %edx # Test if long mode is supported.
66 jnc no_long_mode
67
68 # Load gdtr, idtr
69 lgdt gdtr_inst
70 # Load idtr, but it contains mess - we should not get interrupt
71 # anyway
72 lidt idtr_inst
73
74 movl %cr0,%eax
75 orl $0x1,%eax
76 movl %eax,%cr0 # switch to protected mode
77
78 jmpl $gdtselector(KTEXT32_DES), $now_in_prot
79
80no_long_mode:
811:
82 jmp 1b
83
84# Protected 16-bit. We want to reuse the code-seg descriptor,
85# the Default operand size must not be 1 when entering long mode
86now_in_prot:
87 # Set up stack & data descriptors
88 movw $gdtselector(KDATA_DES), %ax
89 movw %ax, %ds
90 movw %ax, %fs
91 movw %ax, %gs
92 movw %ax, %ss
93
94 # Enable 64-bit page transaltion entries - CR4.PAE = 1.
95 # Paging is not enabled until after long mode is enabled
96 movl %cr4, %eax
97 btsl $5, %eax
98 movl %eax, %cr4
99
100 # Set up paging tables
101 leal ptl_0, %eax
102 movl %eax, %cr3
103
104 # Enable long mode
105 movl $EFER_MSR_NUM, %ecx # EFER MSR number
106 rdmsr # Read EFER
107 btsl $AMD_LME_FLAG, %eax # Set LME=1
108 wrmsr # Write EFER
109
110 # Enable paging to activate long mode (set CR0.PG=1)
111 movl %cr0, %eax
112 btsl $31, %eax
113 movl %eax, %cr0
114
115 # At this point we are in compatibility mode
116 jmpl $gdtselector(KTEXT_DES), $start64
117
118.code64
119start64:
120 movq $(START_STACK_64), %rsp
121
122 call main_bsp # never returns
1231:
124 jmp 1b
125
126.section K_DATA_START
127.align 4096
128
129# Identical mapping of first 16MB and the same of -2GB -> 0
130.global ptl_2
131ptl_2:
132 .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
133 .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
134 .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
135 .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
136 .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
137 .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
138 .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
139 .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
140
141.align 4096
142.global ptl_1
143ptl_1:
144 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
145 .fill 509,8,0
146 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
147 .fill 2,8,0
148
149.align 4096
150.global ptl_0
151ptl_0:
152 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
153 .fill 510,8,0
154 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
155
156.global gdtr_inst
157gdtr_inst:
158 .word gdtselector(GDT_ITEMS)
159 .long KA2PA(gdt)
160
161.global idtr_inst
162idtr_inst:
163 .word idtselector(IDT_ITEMS)
164 .long KA2PA(idt)
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