source: mainline/arch/amd64/src/boot/boot.S@ 776c91a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 776c91a was 776c91a, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Changes to make ia32 smp code not architecture dependent.
Changes to accomodate new gdtr loading scheme.

  • Property mode set to 100644
File size: 4.5 KB
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[1141c1a]1#
[8fc0d455]2# Copyright (C) 2001-2004 Ondrej Palkovsky
[1141c1a]3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[8fc0d455]29#define __ASM__
30
31#include <arch/mm/page.h>
[6f878b7]32#include <arch/mm/ptl.h>
[8fc0d455]33#include <arch/pm.h>
[89344d85]34#include <arch/cpu.h>
[1141c1a]35
[6f878b7]36#define START_STACK 0x7c00
[7df54df]37#define START_STACK_64 0xffffffff80007c00
[6f878b7]38
[1141c1a]39#
40# This is where we require any SPARTAN-kernel-compatible boot loader
41# to pass control in real mode.
42#
43# Protected mode tables are statically initialised during compile
44# time. So we can just load the respective table registers and
45# switch to protected mode.
46#
[6f878b7]47.section K_TEXT_START
48.code16
49.global kernel_image_start
[1141c1a]50kernel_image_start:
[c245372b]51 cli
52 xorw %ax,%ax
53 movw %ax,%ds
54 movw %ax,%ss # initialize stack segment register
[7df54df]55 movl $(START_STACK),%esp # initialize stack pointer
[c245372b]56
[7df54df]57 call memmap_arch_init
[c245372b]58
[8fc0d455]59 movl $0x80000000, %eax
[c245372b]60 cpuid
61 cmp $0x80000000, %eax # any function > 80000000h?
62 jbe no_long_mode
[8fc0d455]63 movl $0x80000001, %eax # Extended function code 80000001
[c245372b]64 cpuid
65 bt $29, %edx # Test if long mode is supported.
66 jnc no_long_mode
[1141c1a]67
[6f878b7]68 # Load gdtr, idtr
[776c91a]69 lgdt bsp_bootstrap_gdtr
[6f878b7]70
71 movl %cr0,%eax
72 orl $0x1,%eax
73 movl %eax,%cr0 # switch to protected mode
[1141c1a]74
[b9e97fb]75 jmpl $gdtselector(KTEXT32_DES), $now_in_prot
[1141c1a]76
[6f878b7]77no_long_mode:
781:
79 jmp 1b
[1141c1a]80
[6f878b7]81# Protected 16-bit. We want to reuse the code-seg descriptor,
82# the Default operand size must not be 1 when entering long mode
83now_in_prot:
84 # Set up stack & data descriptors
[b9e97fb]85 movw $gdtselector(KDATA_DES), %ax
[6f878b7]86 movw %ax, %ds
87 movw %ax, %fs
88 movw %ax, %gs
89 movw %ax, %ss
90
91 # Enable 64-bit page transaltion entries - CR4.PAE = 1.
92 # Paging is not enabled until after long mode is enabled
93 movl %cr4, %eax
94 btsl $5, %eax
95 movl %eax, %cr4
96
97 # Set up paging tables
98 leal ptl_0, %eax
99 movl %eax, %cr3
100
101 # Enable long mode
[89344d85]102 movl $EFER_MSR_NUM, %ecx # EFER MSR number
[6f878b7]103 rdmsr # Read EFER
[89344d85]104 btsl $AMD_LME_FLAG, %eax # Set LME=1
[6f878b7]105 wrmsr # Write EFER
[c245372b]106
[6f878b7]107 # Enable paging to activate long mode (set CR0.PG=1)
108 movl %cr0, %eax
109 btsl $31, %eax
110 movl %eax, %cr0
[c245372b]111
[6f878b7]112 # At this point we are in compatibility mode
[b9e97fb]113 jmpl $gdtselector(KTEXT_DES), $start64
[c245372b]114
[6f878b7]115.code64
116start64:
[7df54df]117 movq $(START_STACK_64), %rsp
[6f878b7]118
119 call main_bsp # never returns
[c245372b]1201:
121 jmp 1b
[b9e97fb]122
[6f878b7]123.section K_DATA_START
[1141c1a]124.align 4096
[b9e97fb]125
126# Identical mapping of first 16MB and the same of -2GB -> 0
[6f878b7]127.global ptl_2
128ptl_2:
129 .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
130 .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
131 .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
132 .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
133 .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
134 .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
135 .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
136 .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
137
138.align 4096
139.global ptl_1
140ptl_1:
141 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
142 .fill 509,8,0
143 .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
144 .fill 2,8,0
145
146.align 4096
147.global ptl_0
148ptl_0:
149 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
150 .fill 510,8,0
151 .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
152
153.global gdtr_inst
[776c91a]154bsp_bootstrap_gdtr:
[b9e97fb]155 .word gdtselector(GDT_ITEMS)
[8fc0d455]156 .long KA2PA(gdt)
[c245372b]157
[776c91a]158.global ap_bootstrap_gdtr
159ap_bootstrap_gdtr:
160 .word gdtselector(GDT_ITEMS)
161 .long KA2PA(gdt)
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