1 | /*
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2 | * Copyright (C) 2005 Jakub Jermar
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | #ifndef __amd64_ASM_H__
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30 | #define __amd64_ASM_H__
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31 |
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32 | #include <arch/types.h>
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33 | #include <config.h>
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34 |
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35 |
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36 | void asm_delay_loop(__u32 t);
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37 | void asm_fake_loop(__u32 t);
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38 |
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39 | /** Return base address of current stack.
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40 | *
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41 | * Return the base address of the current stack.
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42 | * The stack is assumed to be STACK_SIZE bytes long.
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43 | * The stack must start on page boundary.
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44 | */
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45 | static inline __address get_stack_base(void)
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46 | {
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47 | __address v;
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48 |
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49 | __asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1)));
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50 |
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51 | return v;
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52 | }
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53 |
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54 | static inline void cpu_sleep(void) { __asm__ volatile ("hlt"); };
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55 | static inline void cpu_halt(void) { __asm__ volatile ("hlt"); };
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56 |
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57 |
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58 | static inline __u8 inb(__u16 port)
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59 | {
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60 | __u8 out;
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61 |
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62 | __asm__ volatile (
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63 | "mov %1, %%dx;"
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64 | "inb %%dx,%%al;"
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65 | "mov %%al, %0;"
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66 | :"=m"(out)
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67 | :"m"(port)
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68 | :"%rdx","%rax"
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69 | );
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70 | return out;
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71 | }
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72 |
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73 | static inline __u8 outb(__u16 port,__u8 b)
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74 | {
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75 | __asm__ volatile (
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76 | "mov %0,%%dx;"
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77 | "mov %1,%%al;"
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78 | "outb %%al,%%dx;"
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79 | :
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80 | :"m"( port), "m" (b)
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81 | :"%rdx","%rax"
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82 | );
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83 | }
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84 |
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85 | /** Set priority level low
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86 | *
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87 | * Enable interrupts and return previous
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88 | * value of EFLAGS.
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89 | */
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90 | static inline pri_t cpu_priority_low(void) {
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91 | pri_t v;
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92 | __asm__ volatile (
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93 | "pushfq\n"
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94 | "popq %0\n"
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95 | "sti\n"
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96 | : "=r" (v)
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97 | );
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98 | return v;
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99 | }
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100 |
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101 | /** Set priority level high
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102 | *
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103 | * Disable interrupts and return previous
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104 | * value of EFLAGS.
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105 | */
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106 | static inline pri_t cpu_priority_high(void) {
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107 | pri_t v;
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108 | __asm__ volatile (
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109 | "pushfq\n"
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110 | "popq %0\n"
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111 | "cli\n"
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112 | : "=r" (v)
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113 | );
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114 | return v;
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115 | }
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116 |
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117 | /** Restore priority level
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118 | *
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119 | * Restore EFLAGS.
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120 | */
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121 | static inline void cpu_priority_restore(pri_t pri) {
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122 | __asm__ volatile (
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123 | "pushq %0\n"
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124 | "popfq\n"
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125 | : : "r" (pri)
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126 | );
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127 | }
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128 |
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129 | /** Return raw priority level
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130 | *
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131 | * Return EFLAFS.
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132 | */
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133 | static inline pri_t cpu_priority_read(void) {
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134 | pri_t v;
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135 | __asm__ volatile (
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136 | "pushfq\n"
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137 | "popq %0\n"
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138 | : "=r" (v)
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139 | );
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140 | return v;
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141 | }
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142 |
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143 | /** Read CR2
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144 | *
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145 | * Return value in CR2
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146 | *
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147 | * @return Value read.
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148 | */
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149 | static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; }
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150 |
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151 | /** Write CR3
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152 | *
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153 | * Write value to CR3.
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154 | *
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155 | * @param v Value to be written.
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156 | */
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157 | static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); }
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158 |
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159 | /** Read CR3
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160 | *
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161 | * Return value in CR3
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162 | *
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163 | * @return Value read.
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164 | */
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165 | static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; }
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166 |
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167 |
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168 | extern size_t interrupt_handler_size;
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169 | extern void interrupt_handlers(void);
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170 |
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171 | #endif
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