source: mainline/arch/amd64/include/asm.h@ d9f81af3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d9f81af3 was d9f81af3, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Fixed bad type in frame.c.
Amd64 prints banner.

  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __amd64_ASM_H__
30#define __amd64_ASM_H__
31
32#include <arch/types.h>
33#include <config.h>
34
35
36void asm_delay_loop(__u32 t);
37void asm_fake_loop(__u32 t);
38
39
40/* TODO: implement the real stuff */
41static inline __address get_stack_base(void)
42{
43 return NULL;
44}
45
46static inline void cpu_sleep(void) { __asm__("hlt"); };
47
48
49static inline __u8 inb(__u16 port)
50{
51 __u8 out;
52
53 asm (
54 "mov %0, %%dx;"
55 "inb %%dx,%%al;"
56 "mov %%al, %1;"
57 :"=m"(out)
58 :"m"(port)
59 :"%dx","%al"
60 );
61 return out;
62}
63
64static inline __u8 outb(__u16 port,__u8 b)
65{
66 asm (
67 "mov %0,%%dx;"
68 "mov %1,%%al;"
69 "outb %%al,%%dx;"
70 :
71 :"m"( port), "m" (b)
72 :"%dx","%al"
73 );
74}
75
76/** Set priority level low
77 *
78 * Enable interrupts and return previous
79 * value of EFLAGS.
80 */
81static inline pri_t cpu_priority_low(void) {
82 pri_t v;
83 __asm__ volatile (
84 "pushfq\n"
85 "popq %0\n"
86 "sti\n"
87 : "=r" (v)
88 );
89 return v;
90}
91
92/** Set priority level high
93 *
94 * Disable interrupts and return previous
95 * value of EFLAGS.
96 */
97static inline pri_t cpu_priority_high(void) {
98 pri_t v;
99 __asm__ volatile (
100 "pushfq\n"
101 "popq %0\n"
102 "cli\n"
103 : "=r" (v)
104 );
105 return v;
106}
107
108/** Restore priority level
109 *
110 * Restore EFLAGS.
111 */
112static inline void cpu_priority_restore(pri_t pri) {
113 __asm__ volatile (
114 "pushq %0\n"
115 "popfq\n"
116 : : "r" (pri)
117 );
118}
119
120/** Return raw priority level
121 *
122 * Return EFLAFS.
123 */
124static inline pri_t cpu_priority_read(void) {
125 pri_t v;
126 __asm__ volatile (
127 "pushfq\n"
128 "popq %0\n"
129 : "=r" (v)
130 );
131 return v;
132}
133
134/** Read CR2
135 *
136 * Return value in CR2
137 *
138 * @return Value read.
139 */
140static inline __u32 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; }
141
142/** Write CR3
143 *
144 * Write value to CR3.
145 *
146 * @param v Value to be written.
147 */
148static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); }
149
150/** Read CR3
151 *
152 * Return value in CR3
153 *
154 * @return Value read.
155 */
156static inline __u32 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; }
157
158/** Set priority level low
159 *
160 * Enable interrupts and return previous
161 * value of EFLAGS.
162 */
163
164
165
166extern size_t interrupt_handler_size;
167extern void interrupt_handlers(void);
168
169#endif
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