Changeset fff4f21 in mainline
- Timestamp:
- 2014-09-06T23:42:10Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a116f7f2
- Parents:
- f3831af
- Location:
- uspace/drv/audio/hdaudio
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/audio/hdaudio/codec.c
rf3831af rfff4f21 66 66 } 67 67 int rc = hda_cmd(codec->hda, verb, resp); 68 69 /*if (resp != NULL) {68 /* 69 if (resp != NULL) { 70 70 ddf_msg(LVL_NOTE, "verb 0x%" PRIx32 " -> 0x%" PRIx32, verb, 71 71 *resp); … … 173 173 ctl = (stream << cctl_stream_l) | (channel << cctl_channel_l); 174 174 return hda_ccmd(codec, node, hda_converter_ctl_set, ctl, NULL); 175 } 176 177 static int hda_set_pin_ctl(hda_codec_t *codec, int node, uint8_t pctl) 178 { 179 return hda_ccmd(codec, node, hda_pin_ctl_set, pctl, NULL); 180 } 181 182 static int hda_get_pin_ctl(hda_codec_t *codec, int node, uint8_t *pctl) 183 { 184 int rc; 185 uint32_t resp; 186 187 rc = hda_ccmd(codec, node, hda_pin_ctl_get, 0, &resp); 188 if (rc != EOK) 189 return rc; 190 191 *pctl = resp; 192 return EOK; 175 193 } 176 194 … … 225 243 // node, payload, *resp); 226 244 return rc; 245 } 246 247 /** Get GP I/O Count */ 248 static int hda_get_gpio_cnt(hda_codec_t *codec, int node, uint32_t *resp) 249 { 250 return hda_get_parameter(codec, node, hda_gpio_cnt, resp); 227 251 } 228 252 … … 375 399 uint32_t pcaps; 376 400 uint32_t eapd; 401 uint8_t pctl; 377 402 378 403 rc = hda_get_cfg_def(codec, aw, &cfgdef); … … 405 430 ddf_msg(LVL_NOTE, "PIN %d now has EAPD value=0x%x", aw, eapd); 406 431 } 432 433 pctl = 0; 434 if ((pcaps & BIT_V(uint32_t, pwc_output)) != 0) { 435 ddf_msg(LVL_NOTE, "PIN %d will enable output", aw); 436 pctl = pctl | BIT_V(uint8_t, pctl_out_enable); 437 } 438 439 if ((pcaps & BIT_V(uint32_t, pwc_hpd)) != 0) { 440 ddf_msg(LVL_NOTE, "PIN %d will enable headphone drive", aw); 441 pctl = pctl | BIT_V(uint8_t, pctl_hpd_enable); 442 } 443 444 /* if ((pcaps & BIT_V(uint32_t, pwc_input)) != 0) { 445 ddf_msg(LVL_NOTE, "PIN %d will enable input"); 446 pctl = pctl | BIT_V(uint8_t, pctl_input_enable); 447 } 448 */ 449 ddf_msg(LVL_NOTE, "Setting PIN %d ctl to 0x%x", aw, pctl); 450 rc = hda_set_pin_ctl(codec, aw, pctl); 451 if (rc != EOK) 452 goto error; 453 454 pctl = 0; 455 rc = hda_get_pin_ctl(codec, aw, &pctl); 456 if (rc != EOK) 457 goto error; 458 459 ddf_msg(LVL_NOTE, "PIN %d ctl reads as 0x%x", aw, pctl); 407 460 408 461 return EOK; … … 442 495 uint32_t rates; 443 496 uint32_t formats; 497 uint32_t gpio; 444 498 445 499 codec = calloc(1, sizeof(hda_codec_t)); … … 466 520 ddf_msg(LVL_NOTE, "hda_get_fgrp_type -> %d", rc); 467 521 ddf_msg(LVL_NOTE, "unsol: %d, grptype: %d", unsol, grptype); 522 523 rc = hda_get_gpio_cnt(codec, fg, &gpio); 524 if (rc != EOK) 525 goto error; 526 527 ddf_msg(LVL_NOTE, "GPIO: wake=%d unsol=%d gpis=%d gpos=%d gpios=%d", 528 (gpio & BIT_V(uint32_t, 31)) != 0, 529 (gpio & BIT_V(uint32_t, 30)) != 0, 530 BIT_RANGE_EXTRACT(uint32_t, 23, 16, gpio), 531 BIT_RANGE_EXTRACT(uint32_t, 15, 8, gpio), 532 BIT_RANGE_EXTRACT(uint32_t, 7, 0, gpio)); 468 533 469 534 rc = hda_power_ctl_init(codec, fg); -
uspace/drv/audio/hdaudio/spec/codec.h
rf3831af rfff4f21 87 87 /** SDI Select / Set */ 88 88 hda_sdi_select_set = 0x704, 89 /** Enable VRef/ Get */90 hda_ enable_vref_get = 0xf07,91 /** Enable VRef/ Set */92 hda_ enable_vref_set = 0x707,89 /** Pin Control / Get */ 90 hda_pin_ctl_get = 0xf07, 91 /** Pin Control / Set */ 92 hda_pin_ctl_set = 0x707, 93 93 /** Unsolicited Response Control / Get */ 94 94 hda_unsol_resp_get = 0xf08, … … 324 324 } hda_awidget_caps_bits_t; 325 325 326 /** Pin Capabilities */ 326 327 typedef enum { 327 328 /** High Bit Rate */ … … 387 388 } hda_converter_ctl_bits_t; 388 389 390 /** Pin Widget Control bits */ 391 typedef enum { 392 /** Headphone Drive Enable */ 393 pctl_hpd_enable = 7, 394 /** Out Enable */ 395 pctl_out_enable = 6, 396 /** In Enable */ 397 pctl_in_enable = 5, 398 /** Voltage Reference Enable (H) */ 399 pctl_vref_enable_h = 2, 400 /** Voltage Reference Enable (L) */ 401 pctl_vref_enable_l = 0, 402 /** Encoded Packet Type (H) */ 403 pctl_ept_h = 1, 404 /** Encoded Packet Type (L) */ 405 pctl_ept_l = 0 406 } hda_pin_ctl_bits_t; 407 389 408 #endif 390 409 -
uspace/drv/audio/hdaudio/stream.c
rf3831af rfff4f21 198 198 async_usleep(100 * 1000); 199 199 200 //ctl = hda_reg8_read(&sdregs->ctl1);201 //ctl = ctl & ~BIT_V(uint8_t, sdctl1_srst);202 //hda_reg8_write(&sdregs->ctl1, ctl);203 204 //async_usleep(100 * 1000);200 ctl = hda_reg8_read(&sdregs->ctl1); 201 ctl = ctl & ~BIT_V(uint8_t, sdctl1_srst); 202 hda_reg8_write(&sdregs->ctl1, ctl); 203 204 async_usleep(100 * 1000); 205 205 } 206 206
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