Index: kernel/arch/ppc32/include/asm.h =================================================================== --- kernel/arch/ppc32/include/asm.h (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/include/asm.h (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -60,4 +60,24 @@ } +static inline uint32_t msr_read(void) +{ + uint32_t msr; + + asm volatile ( + "mfmsr %[msr]\n" + : [msr] "=r" (msr) + ); + + return msr; +} + +static inline void msr_write(uint32_t msr) +{ + asm volatile ( + "mtmsr %[msr]\n" + :: [msr] "r" (msr) + ); +} + /** Enable interrupts. * Index: kernel/arch/ppc32/include/asm/regname.h =================================================================== --- kernel/arch/ppc32/include/asm/regname.h (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/include/asm/regname.h (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -217,17 +217,4 @@ #define hid0 1008 -/* MSR bits */ -#define msr_dr (1 << 4) -#define msr_ir (1 << 5) -#define msr_pr (1 << 14) -#define msr_ee (1 << 15) - -/* HID0 bits */ -#define hid0_sten (1 << 24) -#define hid0_ice (1 << 15) -#define hid0_dce (1 << 14) -#define hid0_icfi (1 << 11) -#define hid0_dci (1 << 10) - #endif Index: kernel/arch/ppc32/include/drivers/pic.h =================================================================== --- kernel/arch/ppc32/include/drivers/pic.h (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/include/drivers/pic.h (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -39,16 +39,16 @@ #include -#define PIC_PENDING_LOW 8 -#define PIC_PENDING_HIGH 4 -#define PIC_MASK_LOW 9 -#define PIC_MASK_HIGH 5 -#define PIC_ACK_LOW 10 -#define PIC_ACK_HIGH 6 +#define PIC_PENDING_LOW 8 +#define PIC_PENDING_HIGH 4 +#define PIC_MASK_LOW 9 +#define PIC_MASK_HIGH 5 +#define PIC_ACK_LOW 10 +#define PIC_ACK_HIGH 6 -extern void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg); -extern void pic_enable_interrupt(inr_t intnum); -extern void pic_disable_interrupt(inr_t intnum); -extern void pic_ack_interrupt(void *arg, inr_t intnum); -extern int pic_get_pending(void); +extern void pic_init(uintptr_t, size_t, cir_t *, void **); +extern void pic_enable_interrupt(inr_t); +extern void pic_disable_interrupt(inr_t); +extern void pic_ack_interrupt(void *, inr_t); +extern uint8_t pic_get_pending(void); #endif Index: kernel/arch/ppc32/include/exception.h =================================================================== --- kernel/arch/ppc32/include/exception.h (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/include/exception.h (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -27,5 +27,5 @@ */ -/** @addtogroup ppc32 +/** @addtogroup ppc32 * @{ */ @@ -37,5 +37,5 @@ #include -#include +#include typedef struct istate { @@ -86,8 +86,11 @@ } -/** Return true if exception happened while in userspace */ +/** Return true if exception happened while in userspace + * + * The contexts of MSR register was stored in SRR1. + * + */ static inline int istate_from_uspace(istate_t *istate) { - /* true if privilege level PR (copied from MSR) == 1 */ return (istate->srr1 & MSR_PR) != 0; } Index: kernel/arch/ppc32/include/regutils.h =================================================================== --- kernel/arch/ppc32/include/regutils.h (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2008 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** - * @file - * @brief Utilities for convenient manipulation with ppc32 registers. - */ - -#ifndef KERN_ppc32_REGUTILS_H_ -#define KERN_ppc32_REGUTILS_H_ - -#define MSR_PR (1 << 14) - -#endif - -/** @} - */ Index: kernel/arch/ppc32/src/asm.S =================================================================== --- kernel/arch/ppc32/src/asm.S (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/src/asm.S (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -28,4 +28,5 @@ #include +#include .text @@ -43,5 +44,5 @@ userspace_asm: - + # r3 = uspace_uarg # r4 = stack @@ -49,5 +50,5 @@ # disable interrupts - + mfmsr r31 rlwinm r31, r31, 0, 17, 15 @@ -60,6 +61,6 @@ # set problem state, enable interrupts - ori r31, r31, msr_pr - ori r31, r31, msr_ee + ori r31, r31, MSR_PR + ori r31, r31, MSR_EE mtsrr1 r31 @@ -67,7 +68,7 @@ mr sp, r4 - + # %r6 is defined to hold pcb_ptr - set it to 0 - + xor r6, r6, r6 @@ -141,5 +142,5 @@ # reset decrementer - + li r31, 1000 mtdec r31 @@ -201,5 +202,5 @@ lwz r12, 156(sp) lwz sp, 160(sp) - + rfi @@ -213,9 +214,9 @@ memcpy_from_uspace: memcpy_to_uspace: - + srwi. r7, r5, 3 addi r6, r3, -4 addi r4, r4, -4 - beq 2f + beq 2f andi. r0, r6, 3 @@ -225,53 +226,53 @@ 1: - lwz r7, 4(r4) - lwzu r8, 8(r4) - stw r7, 4(r6) - stwu r8, 8(r6) - bdnz 1b - - andi. r5, r5, 7 + lwz r7, 4(r4) + lwzu r8, 8(r4) + stw r7, 4(r6) + stwu r8, 8(r6) + bdnz 1b + + andi. r5, r5, 7 2: - cmplwi 0, r5, 4 - blt 3f - - lwzu r0, 4(r4) - addi r5, r5, -4 - stwu r0, 4(r6) + cmplwi 0, r5, 4 + blt 3f + + lwzu r0, 4(r4) + addi r5, r5, -4 + stwu r0, 4(r6) 3: - cmpwi 0, r5, 0 - beqlr - mtctr r5 - addi r4, r4, 3 - addi r6, r6, 3 + cmpwi 0, r5, 0 + beqlr + mtctr r5 + addi r4, r4, 3 + addi r6, r6, 3 4: - lbzu r0, 1(r4) - stbu r0, 1(r6) - bdnz 4b - blr + lbzu r0, 1(r4) + stbu r0, 1(r6) + bdnz 4b + blr 5: - subfic r0, r0, 4 - mtctr r0 + subfic r0, r0, 4 + mtctr r0 6: - lbz r7, 4(r4) - addi r4, r4, 1 - stb r7, 4(r6) - addi r6, r6, 1 - bdnz 6b - subf r5, r0, r5 - rlwinm. r7, r5, 32-3, 3, 31 - beq 2b - mtctr r7 - b 1b + lbz r7, 4(r4) + addi r4, r4, 1 + stb r7, 4(r6) + addi r6, r6, 1 + bdnz 6b + subf r5, r0, r5 + rlwinm. r7, r5, 32-3, 3, 31 + beq 2b + mtctr r7 + b 1b memcpy_from_uspace_failover_address: Index: kernel/arch/ppc32/src/drivers/pic.c =================================================================== --- kernel/arch/ppc32/src/drivers/pic.c (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/src/drivers/pic.c (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -32,5 +32,4 @@ /** @file */ - #include @@ -79,20 +78,22 @@ } -/** Return number of pending interrupt */ -int pic_get_pending(void) +/** Return number of pending interrupts + * + */ +uint8_t pic_get_pending(void) { if (pic) { - int pending; + uint32_t pending; pending = pic[PIC_PENDING_LOW]; - if (pending) + if (pending != 0) return fnzb32(pending); pending = pic[PIC_PENDING_HIGH]; - if (pending) + if (pending != 0) return fnzb32(pending) + 32; } - return -1; + return 255; } Index: kernel/arch/ppc32/src/exception.S =================================================================== --- kernel/arch/ppc32/src/exception.S (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/src/exception.S (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -28,4 +28,5 @@ #include +#include #include @@ -34,7 +35,7 @@ .macro CONTEXT_STORE - # save R12 in SPRG1, backup CR in R12 + # save r12 in SPRG1, backup CR in r12 # save SP in SPRG2 - + mtsprg1 r12 mfcr r12 @@ -288,5 +289,5 @@ mfmsr r12 - ori r12, r12, (msr_ir | msr_dr)@l + ori r12, r12, (MSR_IR | MSR_DR)@l mtsrr1 r12 @@ -307,5 +308,5 @@ mfmsr r12 - ori r12, r12, (msr_ir | msr_dr)@l + ori r12, r12, (MSR_IR | MSR_DR)@l mtsrr1 r12 Index: kernel/arch/ppc32/src/interrupt.c =================================================================== --- kernel/arch/ppc32/src/interrupt.c (revision 86a3f89bd99f36a5d80e0649f6e95d579e1228b6) +++ kernel/arch/ppc32/src/interrupt.c (revision ffe276fd1c1ea964dc2d354c5002620c06e9e3ac) @@ -44,21 +44,20 @@ #include - void start_decrementer(void) { asm volatile ( - "mtdec %0\n" - : - : "r" (1000) + "mtdec %[dec]\n" + :: [dec] "r" (1000) ); } - -/** Handler of external interrupts */ +/** External interrupts handler + * + */ static void exception_external(int n, istate_t *istate) { - int inum; + uint8_t inum; - while ((inum = pic_get_pending()) != -1) { + while ((inum = pic_get_pending()) != 255) { irq_t *irq = irq_dispatch_and_lock(inum); if (irq) { @@ -80,5 +79,5 @@ } - spinlock_unlock(&irq->lock); + irq_spinlock_unlock(&irq->lock, false); } else { /* @@ -86,10 +85,10 @@ */ #ifdef CONFIG_DEBUG - printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, inum); + printf("cpu%" PRIs ": spurious interrupt (inum=%" PRIu8 ")\n", + CPU->id, inum); #endif } } } - static void exception_decrementer(int n, istate_t *istate) @@ -98,5 +97,4 @@ clock(); } - /* Initialize basic tables for exception dispatching */