Changes in kernel/arch/ia32/src/pm.c [f4946de:ff586e06] in mainline

File:

• kernel/arch/ia32/src/pm.c (modified) (4 diffs)

kernel/arch/ia32/src/pm.c

@@ -75 +75 @@
         /* VESA Init descriptor */
 #ifdef CONFIG_FB
-        { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
-#endif  
+        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+#endif
 };
 
@@ -86 +86 @@
 
 /* gdtr is changed by kmp before next CPU is initialized */
-ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((uintptr_t) gdt) };
-ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (uintptr_t) gdt };
+ptr_16_32_t gdtr = {
+        .limit = sizeof(gdt),
+        .base = (uintptr_t) gdt
+};
 
 void gdt_setbase(descriptor_t *d, uintptr_t base)
@@ -128 +130 @@
 
                 d->unused = 0;
-                d->selector = gdtselector(KTEXT_DES);
+                d->selector = GDT_SELECTOR(KTEXT_DES);
 
                 if (i == VECTOR_SYSCALL) {
@@ -283 +285 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(gdtselector(TSS_DES));
+        tr_load(GDT_SELECTOR(TSS_DES));
         
         clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */