Index: uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c
===================================================================
--- uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c	(revision bf2a2691a357536d160712b23043a69f85f53b83)
+++ uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c	(revision fde2dab993d34305caa16140d803bd72e420ddf6)
@@ -179,6 +179,8 @@
 			        & MPU_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV_MASK);
 			if (multiplier && divisor && divisor2) {
+				/** See AMDM37x TRM p. 300 for the formula */
 				const unsigned freq =
-				    ((base_freq / divisor) * multiplier) / divisor2;
+				    ((base_freq * multiplier) / (divisor + 1))
+				    / divisor2;
 				ddf_msg(LVL_NOTE, "MPU running at %d.%d MHz",
 				    freq / 1000, freq % 1000);
@@ -238,6 +240,7 @@
 		    CLOCK_CONTROL_CM_CLKSEL1_PLL_CORE_DPLL_CLKOUT_DIV_GET(reg);
 		if (multiplier && divisor && divisor2) {
+			/** See AMDM37x TRM p. 300 for the formula */
 			const unsigned freq =
-			    ((base_freq / divisor) * multiplier) / divisor2;
+			    ((base_freq * multiplier) / (divisor + 1)) / divisor2;
 			ddf_msg(LVL_NOTE, "CORE CLK running at %d.%d MHz",
 			    freq / 1000, freq % 1000);
@@ -288,8 +291,9 @@
 	        & CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_MASK)
 	    != CLOCK_CONTROL_CM_CLKEN2_PLL_EN_PERIPH2_DPLL_LOCK) {
-		/* Compute divisors and multiplier */
+		/* Compute divisors and multiplier
+		 * See AMDM37x TRM p. 300 for the formula */
 		assert((base_freq % 100) == 0);
 		const unsigned mult = 1200;
-		const unsigned div = base_freq / 100;
+		const unsigned div = (base_freq / 100) - 1;
 		const unsigned div2 = 1;