Index: kernel/arch/ppc32/src/mm/as.c
===================================================================
--- kernel/arch/ppc32/src/mm/as.c	(revision 63e27efdf2fe6d3fa02bbb5ee1da00df5cc07e9d)
+++ kernel/arch/ppc32/src/mm/as.c	(revision fd57cf17d12bbe3b41626a0b8708f075134a073e)
@@ -56,9 +56,9 @@
 {
 	uint32_t sr;
-	
+
 	/* Lower 2 GB, user and supervisor access */
 	for (sr = 0; sr < 8; sr++)
 		sr_set(0x6000, as->asid, sr);
-	
+
 	/* Upper 2 GB, only supervisor access */
 	for (sr = 8; sr < 16; sr++)
Index: kernel/arch/ppc32/src/mm/frame.c
===================================================================
--- kernel/arch/ppc32/src/mm/frame.c	(revision 63e27efdf2fe6d3fa02bbb5ee1da00df5cc07e9d)
+++ kernel/arch/ppc32/src/mm/frame.c	(revision fd57cf17d12bbe3b41626a0b8708f075134a073e)
@@ -45,5 +45,5 @@
 {
 	printf("[base    ] [size    ]\n");
-	
+
 	size_t i;
 	for (i = 0; i < memmap.cnt; i++) {
@@ -57,5 +57,5 @@
 	pfn_t minconf = 2;
 	size_t i;
-	
+
 	for (i = 0; i < memmap.cnt; i++) {
 		/* To be safe, make the available zone possibly smaller */
@@ -64,5 +64,5 @@
 		size_t size = ALIGN_DOWN(memmap.zones[i].size -
 		    (base - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE);
-		
+
 		if (!frame_adjust_zone_bounds(low, &base, &size))
 			return;
@@ -86,5 +86,5 @@
 		}
 	}
-	
+
 }
 
@@ -92,12 +92,12 @@
 {
 	frame_common_arch_init(true);
-	
+
 	/* First is exception vector, second is 'implementation specific',
 	   third and fourth is reserved, other contain real mode code */
 	frame_mark_unavailable(0, 8);
-	
+
 	/* Mark the Page Hash Table frames as unavailable */
 	uint32_t sdr1 = sdr1_get();
-	
+
 	// FIXME: compute size of PHT exactly
 	frame_mark_unavailable(ADDR2PFN(sdr1 & 0xffff000), 16);
Index: kernel/arch/ppc32/src/mm/pht.c
===================================================================
--- kernel/arch/ppc32/src/mm/pht.c	(revision 63e27efdf2fe6d3fa02bbb5ee1da00df5cc07e9d)
+++ kernel/arch/ppc32/src/mm/pht.c	(revision fd57cf17d12bbe3b41626a0b8708f075134a073e)
@@ -93,11 +93,11 @@
 	uint32_t page = (vaddr >> 12) & 0xffff;
 	uint32_t api = (vaddr >> 22) & 0x3f;
-	
+
 	uint32_t vsid = sr_get(vaddr);
 	uint32_t sdr1 = sdr1_get();
-	
+
 	// FIXME: compute size of PHT exactly
 	phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-	
+
 	/* Primary hash (xor) */
 	uint32_t h = 0;
@@ -106,5 +106,5 @@
 	uint32_t i;
 	bool found = false;
-	
+
 	/* Find colliding PTE in PTEG */
 	for (i = 0; i < 8; i++) {
@@ -117,5 +117,5 @@
 		}
 	}
-	
+
 	if (!found) {
 		/* Find unused PTE in PTEG */
@@ -127,9 +127,9 @@
 		}
 	}
-	
+
 	if (!found) {
 		/* Secondary hash (not) */
 		uint32_t base2 = (~hash & 0x3ff) << 3;
-		
+
 		/* Find colliding PTE in PTEG */
 		for (i = 0; i < 8; i++) {
@@ -144,5 +144,5 @@
 			}
 		}
-		
+
 		if (!found) {
 			/* Find unused PTE in PTEG */
@@ -156,9 +156,9 @@
 			}
 		}
-		
+
 		if (!found)
 			i = RANDI(seed) % 8;
 	}
-	
+
 	phte[base + i].v = 1;
 	phte[base + i].vsid = vsid;
@@ -181,14 +181,14 @@
 {
 	uintptr_t badvaddr;
-	
+
 	if (n == VECTOR_DATA_STORAGE)
 		badvaddr = istate->dar;
 	else
 		badvaddr = istate->pc;
-	
+
 	pte_t pte;
 	bool found = find_mapping_and_check(AS, badvaddr,
 	    PF_ACCESS_READ /* FIXME */, istate, &pte);
-	
+
 	if (found) {
 		/* Record access to PTE */
@@ -201,8 +201,8 @@
 {
 	uint32_t sdr1 = sdr1_get();
-	
+
 	// FIXME: compute size of PHT exactly
 	phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-	
+
 	// FIXME: this invalidates all PHT entries,
 	// which is an overkill, invalidate only
Index: kernel/arch/ppc32/src/mm/tlb.c
===================================================================
--- kernel/arch/ppc32/src/mm/tlb.c	(revision 63e27efdf2fe6d3fa02bbb5ee1da00df5cc07e9d)
+++ kernel/arch/ppc32/src/mm/tlb.c	(revision fd57cf17d12bbe3b41626a0b8708f075134a073e)
@@ -42,5 +42,5 @@
 	ptehi_t ptehi;
 	ptelo_t ptelo;
-	
+
 	asm volatile (
 		"mfspr %[tlbmiss], 980\n"
@@ -51,15 +51,15 @@
 		  [ptelo] "=r" (ptelo)
 	);
-	
+
 	uint32_t badvaddr = tlbmiss & 0xfffffffc;
 	uint32_t physmem = physmem_top();
-	
+
 	if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
 		return; // FIXME
-	
+
 	ptelo.rpn = KA2PA(badvaddr) >> 12;
 	ptelo.wimg = 0;
 	ptelo.pp = 2; // FIXME
-	
+
 	uint32_t index = 0;
 	asm volatile (
@@ -84,5 +84,5 @@
 		"sync\n"
 	);
-	
+
 	for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
 		asm volatile (
@@ -91,5 +91,5 @@
 		);
 	}
-	
+
 	asm volatile (
 		"eieio\n"
@@ -143,8 +143,8 @@
 {
 	uint32_t sr;
-	
+
 	for (sr = 0; sr < 16; sr++) {
 		uint32_t vsid = sr_get(sr << 28);
-		
+
 		printf("sr[%02" PRIu32 "]: vsid=%#0" PRIx32 " (asid=%" PRIu32 ")"
 		    "%s%s\n", sr, vsid & UINT32_C(0x00ffffff),
@@ -153,15 +153,15 @@
 		    ((vsid >> 29) & 1) ? " user" : "");
 	}
-	
+
 	uint32_t upper;
 	uint32_t lower;
 	uint32_t mask;
 	uint32_t length;
-	
+
 	PRINT_BAT("ibat[0]", 528, 529);
 	PRINT_BAT("ibat[1]", 530, 531);
 	PRINT_BAT("ibat[2]", 532, 533);
 	PRINT_BAT("ibat[3]", 534, 535);
-	
+
 	PRINT_BAT("dbat[0]", 536, 537);
 	PRINT_BAT("dbat[1]", 538, 539);