Index: kernel/arch/amd64/src/interrupt.c
===================================================================
--- kernel/arch/amd64/src/interrupt.c	(revision c5396c1804ab53d2d15266e72be0b0617bebb8b3)
+++ kernel/arch/amd64/src/interrupt.c	(revision fd07e57b67ceab8f6bff8103a832fe90c48a7715)
@@ -35,4 +35,5 @@
 #include <arch/interrupt.h>
 #include <print.h>
+#include <log.h>
 #include <debug.h>
 #include <panic.h>
@@ -66,16 +67,16 @@
 void istate_decode(istate_t *istate)
 {
-	printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
+	log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
 	    "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
 	    istate->cs, istate->rip, istate->rflags, istate->error_word);
 	
 	if (istate_from_uspace(istate))
-		printf("ss =%0#18" PRIx64 "\n", istate->ss);
-	
-	printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
+		log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
+	
+	log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
 	    "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
 	    istate->rax, istate->rbx, istate->rcx, istate->rdx);
 	
-	printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
+	log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
 	    "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
 	    istate->rsi, istate->rdi, istate->rbp,
@@ -83,9 +84,9 @@
 	    (uintptr_t) &istate->rsp);
 	
-	printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
+	log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
 	    "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
 	    istate->r8, istate->r9, istate->r10, istate->r11);
 	
-	printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
+	log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
 	    "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
 	    istate->r12, istate->r13, istate->r14, istate->r15);
@@ -193,5 +194,6 @@
 		 */
 #ifdef CONFIG_DEBUG
-		printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
+		log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
+		    CPU->id, inum);
 #endif
 	}
