Index: kernel/arch/mips32/include/arch/asm.h
===================================================================
--- kernel/arch/mips32/include/arch/asm.h	(revision deacd722f7dca626637926215ebe69ffd2fd67f5)
+++ kernel/arch/mips32/include/arch/asm.h	(revision fc448f5f560ea1a9a7e90a7dff181e501713aa1e)
@@ -40,5 +40,5 @@
 #include <trace.h>
 
-NO_TRACE static inline void cpu_sleep(void)
+_NO_TRACE static inline void cpu_sleep(void)
 {
 	asm volatile ("wait");
@@ -52,5 +52,5 @@
  *
  */
-NO_TRACE static inline uintptr_t get_stack_base(void)
+_NO_TRACE static inline uintptr_t get_stack_base(void)
 {
 	uintptr_t base;
@@ -65,30 +65,30 @@
 }
 
-NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
+_NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
 {
 	*port = v;
 }
 
-NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
+_NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
 {
 	*port = v;
 }
 
-NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
+_NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
 {
 	*port = v;
 }
 
-NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
+_NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
 {
 	return *port;
 }
 
-NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
+_NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
 {
 	return *port;
 }
 
-NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
+_NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
 {
 	return *port;
Index: kernel/arch/mips32/include/arch/cycle.h
===================================================================
--- kernel/arch/mips32/include/arch/cycle.h	(revision deacd722f7dca626637926215ebe69ffd2fd67f5)
+++ kernel/arch/mips32/include/arch/cycle.h	(revision fc448f5f560ea1a9a7e90a7dff181e501713aa1e)
@@ -40,5 +40,5 @@
 #include <trace.h>
 
-NO_TRACE static inline uint64_t get_cycle(void)
+_NO_TRACE static inline uint64_t get_cycle(void)
 {
 	return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read());
Index: kernel/arch/mips32/include/arch/istate.h
===================================================================
--- kernel/arch/mips32/include/arch/istate.h	(revision deacd722f7dca626637926215ebe69ffd2fd67f5)
+++ kernel/arch/mips32/include/arch/istate.h	(revision fc448f5f560ea1a9a7e90a7dff181e501713aa1e)
@@ -50,5 +50,5 @@
 #endif /* KERNEL */
 
-NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
+_NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
     uintptr_t retaddr)
 {
@@ -57,15 +57,15 @@
 
 /** Return true if exception happened while in userspace */
-NO_TRACE static inline int istate_from_uspace(istate_t *istate)
+_NO_TRACE static inline int istate_from_uspace(istate_t *istate)
 {
 	return istate->status & cp0_status_um_bit;
 }
 
-NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
+_NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
 {
 	return istate->epc;
 }
 
-NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
+_NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
 {
 	return istate->sp;
Index: kernel/arch/mips32/include/arch/mm/page.h
===================================================================
--- kernel/arch/mips32/include/arch/mm/page.h	(revision deacd722f7dca626637926215ebe69ffd2fd67f5)
+++ kernel/arch/mips32/include/arch/mm/page.h	(revision fc448f5f560ea1a9a7e90a7dff181e501713aa1e)
@@ -161,5 +161,5 @@
 } pte_t;
 
-NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
+_NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
 {
 	pte_t *p = &pt[i];
@@ -174,5 +174,5 @@
 }
 
-NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
+_NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
 {
 	pte_t *p = &pt[i];
@@ -189,5 +189,5 @@
 }
 
-NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)
+_NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)
 {
 	pte_t *p = &pt[i];
Index: kernel/arch/mips32/include/arch/mm/tlb.h
===================================================================
--- kernel/arch/mips32/include/arch/mm/tlb.h	(revision deacd722f7dca626637926215ebe69ffd2fd67f5)
+++ kernel/arch/mips32/include/arch/mm/tlb.h	(revision fc448f5f560ea1a9a7e90a7dff181e501713aa1e)
@@ -135,5 +135,5 @@
  * Probe TLB for Matching Entry.
  */
-NO_TRACE static inline void tlbp(void)
+_NO_TRACE static inline void tlbp(void)
 {
 	asm volatile ("tlbp\n\t");
@@ -144,5 +144,5 @@
  * Read Indexed TLB Entry.
  */
-NO_TRACE static inline void tlbr(void)
+_NO_TRACE static inline void tlbr(void)
 {
 	asm volatile ("tlbr\n\t");
@@ -153,5 +153,5 @@
  * Write Indexed TLB Entry.
  */
-NO_TRACE static inline void tlbwi(void)
+_NO_TRACE static inline void tlbwi(void)
 {
 	asm volatile ("tlbwi\n\t");
@@ -162,5 +162,5 @@
  * Write Random TLB Entry.
  */
-NO_TRACE static inline void tlbwr(void)
+_NO_TRACE static inline void tlbwr(void)
 {
 	asm volatile ("tlbwr\n\t");