Changeset fbcfc4da in mainline for kernel/arch/arm32/include/mm/page.h
- Timestamp:
- 2009-12-03T19:25:17Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9510be2
- Parents:
- cb3d641a (diff), 22e6802 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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links above to see all the changes relative to each parent. - File:
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- 1 edited
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kernel/arch/arm32/include/mm/page.h
rcb3d641a rfbcfc4da 75 75 /* Get PTE address accessors for each level. */ 76 76 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ 77 ((pte_t *) ((((pte_ level0_t *)(ptl0))[(i)]).coarse_table_addr << 10))77 ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) 78 78 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ 79 79 (ptl1) … … 81 81 (ptl2) 82 82 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ 83 ((uintptr_t) ((((pte_ level1_t *)(ptl3))[(i)]).frame_base_addr << 12))83 ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) 84 84 85 85 /* Set PTE address accessors for each level. */ 86 86 #define SET_PTL0_ADDRESS_ARCH(ptl0) \ 87 (set_ptl0_addr((pte_ level0_t *) (ptl0)))87 (set_ptl0_addr((pte_t *) (ptl0))) 88 88 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ 89 (((pte_ level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10)89 (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) 90 90 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) 91 91 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) 92 92 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ 93 (((pte_ level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12)93 (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) 94 94 95 95 /* Get PTE flags accessors for each level. */ 96 96 #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ 97 get_pt_level0_flags((pte_ level0_t *) (ptl0), (size_t) (i))97 get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) 98 98 #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ 99 99 PAGE_PRESENT … … 101 101 PAGE_PRESENT 102 102 #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ 103 get_pt_level1_flags((pte_ level1_t *) (ptl3), (size_t) (i))103 get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) 104 104 105 105 /* Set PTE flags accessors for each level. */ 106 106 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ 107 set_pt_level0_flags((pte_ level0_t *) (ptl0), (size_t) (i), (x))107 set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) 108 108 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) 109 109 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) 110 110 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ 111 set_pt_level1_flags((pte_ level1_t *) (ptl3), (size_t) (i), (x))111 set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) 112 112 113 113 /* Macros for querying the last-level PTE entries. */ … … 115 115 (*((uint32_t *) (pte)) != 0) 116 116 #define PTE_PRESENT_ARCH(pte) \ 117 (((pte_ level0_t *) (pte))->descriptor_type != 0)117 (((pte_t *) (pte))->l0.descriptor_type != 0) 118 118 #define PTE_GET_FRAME_ARCH(pte) \ 119 (((pte_ level1_t *) (pte))->frame_base_addr << FRAME_WIDTH)119 (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) 120 120 #define PTE_WRITABLE_ARCH(pte) \ 121 (((pte_level1_t *) (pte))->access_permission_0 == \ 122 PTE_AP_USER_RW_KERNEL_RW) 121 (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) 123 122 #define PTE_EXECUTABLE_ARCH(pte) \ 124 123 1 … … 159 158 } ATTRIBUTE_PACKED pte_level1_t; 160 159 160 typedef union { 161 pte_level0_t l0; 162 pte_level1_t l1; 163 } pte_t; 161 164 162 165 /* Level 1 page tables access permissions */ … … 191 194 * @param pt Pointer to the page table to set. 192 195 */ 193 static inline void set_ptl0_addr(pte_ level0_t *pt)196 static inline void set_ptl0_addr(pte_t *pt) 194 197 { 195 198 asm volatile ( … … 205 208 * @param i Index of the entry to return. 206 209 */ 207 static inline int get_pt_level0_flags(pte_ level0_t *pt, size_t i)208 { 209 pte_level0_t *p = &pt[i] ;210 static inline int get_pt_level0_flags(pte_t *pt, size_t i) 211 { 212 pte_level0_t *p = &pt[i].l0; 210 213 int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); 211 214 … … 220 223 * @param i Index of the entry to return. 221 224 */ 222 static inline int get_pt_level1_flags(pte_ level1_t *pt, size_t i)223 { 224 pte_level1_t *p = &pt[i] ;225 static inline int get_pt_level1_flags(pte_t *pt, size_t i) 226 { 227 pte_level1_t *p = &pt[i].l1; 225 228 226 229 int dt = p->descriptor_type; … … 245 248 * @param flags new flags 246 249 */ 247 static inline void set_pt_level0_flags(pte_ level0_t *pt, size_t i, int flags)248 { 249 pte_level0_t *p = &pt[i] ;250 static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) 251 { 252 pte_level0_t *p = &pt[i].l0; 250 253 251 254 if (flags & PAGE_NOT_PRESENT) { … … 273 276 * @param flags New flags. 274 277 */ 275 static inline void set_pt_level1_flags(pte_ level1_t *pt, size_t i, int flags)276 { 277 pte_level1_t *p = &pt[i] ;278 static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) 279 { 280 pte_level1_t *p = &pt[i].l1; 278 281 279 282 if (flags & PAGE_NOT_PRESENT) {
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