Index: uspace/drv/bus/usb/ehci/Makefile =================================================================== --- uspace/drv/bus/usb/ehci/Makefile (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ehci/Makefile (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -43,5 +43,5 @@ SOURCES = \ main.c \ - pci.c + res.c include $(USPACE_PREFIX)/Makefile.common Index: uspace/drv/bus/usb/ehci/ehci.ma =================================================================== --- uspace/drv/bus/usb/ehci/ehci.ma (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ehci/ehci.ma (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -1,1 +1,2 @@ +20 usb/host=ehci 10 pci/class=0c&subclass=03&progif=20 Index: uspace/drv/bus/usb/ehci/main.c =================================================================== --- uspace/drv/bus/usb/ehci/main.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ehci/main.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -44,5 +44,5 @@ #include -#include "pci.h" +#include "res.h" #define NAME "ehci" @@ -81,5 +81,5 @@ int irq = 0; - int ret = pci_get_my_registers(device, ®_base, ®_size, &irq); + int ret = get_my_registers(device, ®_base, ®_size, &irq); CHECK_RET_RETURN(ret, "Failed to get memory addresses for %" PRIun ": %s.\n", @@ -88,5 +88,5 @@ reg_base, reg_size, irq); - ret = pci_disable_legacy(device, reg_base, reg_size, irq); + ret = disable_legacy(device, reg_base, reg_size); CHECK_RET_RETURN(ret, "Failed to disable legacy USB: %s.\n", str_error(ret)); Index: uspace/drv/bus/usb/ehci/pci.c =================================================================== --- uspace/drv/bus/usb/ehci/pci.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,391 +1,0 @@ -/* - * Copyright (c) 2011 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @addtogroup drvusbehci - * @{ - */ -/** - * @file - * PCI related functions needed by the EHCI driver. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "pci.h" - -#define PAGE_SIZE_MASK 0xfffff000 - -#define HCC_PARAMS_OFFSET 0x8 -#define HCC_PARAMS_EECP_MASK 0xff -#define HCC_PARAMS_EECP_OFFSET 8 - -#define CMD_OFFSET 0x0 -#define STS_OFFSET 0x4 -#define INT_OFFSET 0x8 -#define CFG_OFFSET 0x40 - -#define USBCMD_RUN 1 -#define USBSTS_HALTED (1 << 12) - -#define USBLEGSUP_OFFSET 0 -#define USBLEGSUP_BIOS_CONTROL (1 << 16) -#define USBLEGSUP_OS_CONTROL (1 << 24) -#define USBLEGCTLSTS_OFFSET 4 - -#define DEFAULT_WAIT 1000 -#define WAIT_STEP 10 - -#define PCI_READ(size) \ -do { \ - async_sess_t *parent_sess = \ - devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, \ - IPC_FLAG_BLOCKING); \ - if (!parent_sess) \ - return ENOMEM; \ - \ - sysarg_t add = (sysarg_t) address; \ - sysarg_t val; \ - \ - async_exch_t *exch = async_exchange_begin(parent_sess); \ - \ - const int ret = \ - async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE), \ - IPC_M_CONFIG_SPACE_READ_##size, add, &val); \ - \ - async_exchange_end(exch); \ - async_hangup(parent_sess); \ - \ - assert(value); \ - \ - *value = val; \ - return ret; \ -} while (0) - -static int pci_read32(const ddf_dev_t *dev, int address, uint32_t *value) -{ - PCI_READ(32); -} - -static int pci_read16(const ddf_dev_t *dev, int address, uint16_t *value) -{ - PCI_READ(16); -} - -static int pci_read8(const ddf_dev_t *dev, int address, uint8_t *value) -{ - PCI_READ(8); -} - -#define PCI_WRITE(size) \ -do { \ - async_sess_t *parent_sess = \ - devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, \ - IPC_FLAG_BLOCKING); \ - if (!parent_sess) \ - return ENOMEM; \ - \ - sysarg_t add = (sysarg_t) address; \ - sysarg_t val = value; \ - \ - async_exch_t *exch = async_exchange_begin(parent_sess); \ - \ - const int ret = \ - async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE), \ - IPC_M_CONFIG_SPACE_WRITE_##size, add, val); \ - \ - async_exchange_end(exch); \ - async_hangup(parent_sess); \ - \ - return ret; \ -} while(0) - -static int pci_write32(const ddf_dev_t *dev, int address, uint32_t value) -{ - PCI_WRITE(32); -} - -static int pci_write16(const ddf_dev_t *dev, int address, uint16_t value) -{ - PCI_WRITE(16); -} - -static int pci_write8(const ddf_dev_t *dev, int address, uint8_t value) -{ - PCI_WRITE(8); -} - -/** Get address of registers and IRQ for given device. - * - * @param[in] dev Device asking for the addresses. - * @param[out] mem_reg_address Base address of the memory range. - * @param[out] mem_reg_size Size of the memory range. - * @param[out] irq_no IRQ assigned to the device. - * @return Error code. - */ -int pci_get_my_registers(const ddf_dev_t *dev, - uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) -{ - assert(dev != NULL); - - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - hw_resource_list_t hw_resources; - int rc = hw_res_get_resource_list(parent_sess, &hw_resources); - if (rc != EOK) { - async_hangup(parent_sess); - return rc; - } - - uintptr_t mem_address = 0; - size_t mem_size = 0; - bool mem_found = false; - - int irq = 0; - bool irq_found = false; - - size_t i; - for (i = 0; i < hw_resources.count; i++) { - hw_resource_t *res = &hw_resources.resources[i]; - switch (res->type) { - case INTERRUPT: - irq = res->res.interrupt.irq; - irq_found = true; - usb_log_debug2("Found interrupt: %d.\n", irq); - break; - case MEM_RANGE: - if (res->res.mem_range.address != 0 - && res->res.mem_range.size != 0 ) { - mem_address = res->res.mem_range.address; - mem_size = res->res.mem_range.size; - usb_log_debug2("Found mem: %" PRIxn" %zu.\n", - mem_address, mem_size); - mem_found = true; - } - default: - break; - } - } - - if (mem_found && irq_found) { - *mem_reg_address = mem_address; - *mem_reg_size = mem_size; - *irq_no = irq; - rc = EOK; - } else { - rc = ENOENT; - } - - async_hangup(parent_sess); - return rc; -} -/*----------------------------------------------------------------------------*/ -/** Calls the PCI driver with a request to enable interrupts - * - * @param[in] device Device asking for interrupts - * @return Error code. - */ -int pci_enable_interrupts(const ddf_dev_t *device) -{ - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - const bool enabled = hw_res_enable_interrupt(parent_sess); - async_hangup(parent_sess); - - return enabled ? EOK : EIO; -} -/*----------------------------------------------------------------------------*/ -/** Implements BIOS handoff routine as decribed in EHCI spec - * - * @param[in] device Device asking for interrupts - * @return Error code. - */ -int pci_disable_legacy( - const ddf_dev_t *device, uintptr_t reg_base, size_t reg_size, int irq) -{ - assert(device); - (void) pci_read16; - (void) pci_read8; - (void) pci_write16; - -#define CHECK_RET_RETURN(ret, message...) \ - if (ret != EOK) { \ - usb_log_error(message); \ - return ret; \ - } else (void)0 - - /* Map EHCI registers */ - void *regs = NULL; - int ret = pio_enable((void*)reg_base, reg_size, ®s); - CHECK_RET_RETURN(ret, "Failed to map registers %p: %s.\n", - (void *) reg_base, str_error(ret)); - - const uint32_t hcc_params = - *(uint32_t*)(regs + HCC_PARAMS_OFFSET); - usb_log_debug("Value of hcc params register: %x.\n", hcc_params); - - /* Read value of EHCI Extended Capabilities Pointer - * position of EEC registers (points to PCI config space) */ - const uint32_t eecp = - (hcc_params >> HCC_PARAMS_EECP_OFFSET) & HCC_PARAMS_EECP_MASK; - usb_log_debug("Value of EECP: %x.\n", eecp); - - /* Read the first EEC. i.e. Legacy Support register */ - uint32_t usblegsup; - ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup); - CHECK_RET_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", str_error(ret)); - usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); - - /* Request control from firmware/BIOS, by writing 1 to highest byte. - * (OS Control semaphore)*/ - usb_log_debug("Requesting OS control.\n"); - ret = pci_write8(device, eecp + USBLEGSUP_OFFSET + 3, 1); - CHECK_RET_RETURN(ret, "Failed to request OS EHCI control: %s.\n", - str_error(ret)); - - size_t wait = 0; - /* Wait for BIOS to release control. */ - ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup); - while ((wait < DEFAULT_WAIT) && (usblegsup & USBLEGSUP_BIOS_CONTROL)) { - async_usleep(WAIT_STEP); - ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup); - wait += WAIT_STEP; - } - - - if ((usblegsup & USBLEGSUP_BIOS_CONTROL) == 0) { - usb_log_info("BIOS released control after %zu usec.\n", wait); - } else { - /* BIOS failed to hand over control, this should not happen. */ - usb_log_warning( "BIOS failed to release control after " - "%zu usecs, force it.\n", wait); - ret = pci_write32(device, eecp + USBLEGSUP_OFFSET, - USBLEGSUP_OS_CONTROL); - CHECK_RET_RETURN(ret, "Failed to force OS control: %s.\n", - str_error(ret)); - /* Check capability type here, A value of 01h - * identifies the capability as Legacy Support. - * This extended capability requires one - * additional 32-bit register for control/status information, - * and this register is located at offset EECP+04h - * */ - if ((usblegsup & 0xff) == 1) { - /* Read the second EEC - * Legacy Support and Control register */ - uint32_t usblegctlsts; - ret = pci_read32( - device, eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); - CHECK_RET_RETURN(ret, - "Failed to get USBLEGCTLSTS: %s.\n", str_error(ret)); - usb_log_debug("USBLEGCTLSTS: %" PRIx32 ".\n", - usblegctlsts); - /* Zero SMI enables in legacy control register. - * It should prevent pre-OS code from interfering. */ - ret = pci_write32(device, eecp + USBLEGCTLSTS_OFFSET, - 0xe0000000); /* three upper bits are WC */ - CHECK_RET_RETURN(ret, - "Failed(%d) zero USBLEGCTLSTS.\n", ret); - udelay(10); - ret = pci_read32( - device, eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); - CHECK_RET_RETURN(ret, - "Failed to get USBLEGCTLSTS 2: %s.\n", - str_error(ret)); - usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIx32 ".\n", - usblegctlsts); - } - } - - - /* Read again Legacy Support register */ - ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup); - CHECK_RET_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", str_error(ret)); - usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); - - /* - * TURN OFF EHCI FOR NOW, DRIVER WILL REINITIALIZE IT - */ - - /* Get size of capability registers in memory space. */ - const unsigned operation_offset = *(uint8_t*)regs; - usb_log_debug("USBCMD offset: %d.\n", operation_offset); - - /* Zero USBCMD register. */ - volatile uint32_t *usbcmd = - (uint32_t*)((uint8_t*)regs + operation_offset + CMD_OFFSET); - volatile uint32_t *usbsts = - (uint32_t*)((uint8_t*)regs + operation_offset + STS_OFFSET); - volatile uint32_t *usbconf = - (uint32_t*)((uint8_t*)regs + operation_offset + CFG_OFFSET); - volatile uint32_t *usbint = - (uint32_t*)((uint8_t*)regs + operation_offset + INT_OFFSET); - usb_log_debug("USBCMD value: %x.\n", *usbcmd); - if (*usbcmd & USBCMD_RUN) { - *usbsts = 0x3f; /* ack all interrupts */ - *usbint = 0; /* disable all interrutps */ - *usbconf = 0; /* relase control of RH ports */ - - *usbcmd = 0; - /* Wait until hc is halted */ - while ((*usbsts & USBSTS_HALTED) == 0); - usb_log_info("EHCI turned off.\n"); - } else { - usb_log_info("EHCI was not running.\n"); - } - usb_log_debug("Registers: \n" - "\t USBCMD: %x(0x00080000 = at least 1ms between interrupts)\n" - "\t USBSTS: %x(0x00001000 = HC halted)\n" - "\t USBINT: %x(0x0 = no interrupts).\n" - "\t CONFIG: %x(0x0 = ports controlled by companion hc).\n", - *usbcmd, *usbsts, *usbint, *usbconf); - - return ret; -#undef CHECK_RET_RETURN -} - -/** - * @} - */ Index: uspace/drv/bus/usb/ehci/pci.h =================================================================== --- uspace/drv/bus/usb/ehci/pci.h (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2011 Vojtech Horky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup drvusbehci - * @{ - */ -/** @file - * PCI related functions needed by EHCI driver. - */ -#ifndef DRV_EHCI_PCI_H -#define DRV_EHCI_PCI_H - -#include - -int pci_get_my_registers(const ddf_dev_t *, uintptr_t *, size_t *, int *); -int pci_enable_interrupts(const ddf_dev_t *); -int pci_disable_legacy(const ddf_dev_t *, uintptr_t, size_t, int); - -#endif -/** - * @} - */ - Index: uspace/drv/bus/usb/ehci/res.c =================================================================== --- uspace/drv/bus/usb/ehci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/ehci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,310 @@ +/* + * Copyright (c) 2011 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @addtogroup drvusbehci + * @{ + */ +/** + * @file + * PCI related functions needed by the EHCI driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "res.h" + +#define HCC_PARAMS_OFFSET 0x8 +#define HCC_PARAMS_EECP_MASK 0xff +#define HCC_PARAMS_EECP_OFFSET 8 + +#define CMD_OFFSET 0x0 +#define STS_OFFSET 0x4 +#define INT_OFFSET 0x8 +#define CFG_OFFSET 0x40 + +#define USBCMD_RUN 1 +#define USBSTS_HALTED (1 << 12) + +#define USBLEGSUP_OFFSET 0 +#define USBLEGSUP_BIOS_CONTROL (1 << 16) +#define USBLEGSUP_OS_CONTROL (1 << 24) +#define USBLEGCTLSTS_OFFSET 4 + +#define DEFAULT_WAIT 1000 +#define WAIT_STEP 10 + + +/** Get address of registers and IRQ for given device. + * + * @param[in] dev Device asking for the addresses. + * @param[out] mem_reg_address Base address of the memory range. + * @param[out] mem_reg_size Size of the memory range. + * @param[out] irq_no IRQ assigned to the device. + * @return Error code. + */ +int get_my_registers(const ddf_dev_t *dev, + uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) +{ + assert(dev); + + async_sess_t *parent_sess = devman_parent_device_connect( + EXCHANGE_SERIALIZE, dev->handle, IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + hw_res_list_parsed_t hw_res; + hw_res_list_parsed_init(&hw_res); + const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); + async_hangup(parent_sess); + if (ret != EOK) { + return ret; + } + + if (hw_res.irqs.count != 1 || hw_res.mem_ranges.count != 1) { + hw_res_list_parsed_clean(&hw_res); + return ENOENT; + } + + if (mem_reg_address) + *mem_reg_address = hw_res.mem_ranges.ranges[0].address; + if (mem_reg_size) + *mem_reg_size = hw_res.mem_ranges.ranges[0].size; + if (irq_no) + *irq_no = hw_res.irqs.irqs[0]; + + hw_res_list_parsed_clean(&hw_res); + return EOK; +} +/*----------------------------------------------------------------------------*/ +/** Calls the PCI driver with a request to enable interrupts + * + * @param[in] device Device asking for interrupts + * @return Error code. + */ +int enable_interrupts(const ddf_dev_t *device) +{ + async_sess_t *parent_sess = devman_parent_device_connect( + EXCHANGE_SERIALIZE, device->handle, IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + const bool enabled = hw_res_enable_interrupt(parent_sess); + async_hangup(parent_sess); + + return enabled ? EOK : EIO; +} +/*----------------------------------------------------------------------------*/ +/** Implements BIOS hands-off routine as described in EHCI spec + * + * @param device EHCI device + * @param eecp Value of EHCI Extended Capabilities pointer. + * @return Error code. + */ +static int disable_extended_caps(const ddf_dev_t *device, unsigned eecp) +{ + /* nothing to do */ + if (eecp == 0) + return EOK; + + async_sess_t *parent_sess = devman_parent_device_connect( + EXCHANGE_SERIALIZE, device->handle, IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + +#define CHECK_RET_HANGUP_RETURN(ret, message...) \ + if (ret != EOK) { \ + usb_log_error(message); \ + async_hangup(parent_sess); \ + return ret; \ + } else (void)0 + + /* Read the first EEC. i.e. Legacy Support register */ + uint32_t usblegsup; + int ret = pci_config_space_read_32(parent_sess, + eecp + USBLEGSUP_OFFSET, &usblegsup); + CHECK_RET_HANGUP_RETURN(ret, + "Failed to read USBLEGSUP: %s.\n", str_error(ret)); + usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); + + /* Request control from firmware/BIOS by writing 1 to highest + * byte. (OS Control semaphore)*/ + usb_log_debug("Requesting OS control.\n"); + ret = pci_config_space_write_8(parent_sess, + eecp + USBLEGSUP_OFFSET + 3, 1); + CHECK_RET_HANGUP_RETURN(ret, "Failed to request OS EHCI control: %s.\n", + str_error(ret)); + + size_t wait = 0; + /* Wait for BIOS to release control. */ + ret = pci_config_space_read_32( + parent_sess, eecp + USBLEGSUP_OFFSET, &usblegsup); + while ((wait < DEFAULT_WAIT) && (usblegsup & USBLEGSUP_BIOS_CONTROL)) { + async_usleep(WAIT_STEP); + ret = pci_config_space_read_32(parent_sess, + eecp + USBLEGSUP_OFFSET, &usblegsup); + wait += WAIT_STEP; + } + + if ((usblegsup & USBLEGSUP_BIOS_CONTROL) == 0) { + usb_log_info("BIOS released control after %zu usec.\n", wait); + async_hangup(parent_sess); + return EOK; + } + + /* BIOS failed to hand over control, this should not happen. */ + usb_log_warning( "BIOS failed to release control after " + "%zu usecs, force it.\n", wait); + ret = pci_config_space_write_32(parent_sess, + eecp + USBLEGSUP_OFFSET, USBLEGSUP_OS_CONTROL); + CHECK_RET_HANGUP_RETURN(ret, "Failed to force OS control: " + "%s.\n", str_error(ret)); + /* + * Check capability type here, value of 01h identifies the capability + * as Legacy Support. This extended capability requires one additional + * 32-bit register for control/status information and this register is + * located at offset EECP+04h + */ + if ((usblegsup & 0xff) == 1) { + /* Read the second EEC Legacy Support and Control register */ + uint32_t usblegctlsts; + ret = pci_config_space_read_32(parent_sess, + eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); + CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS: %s.\n", + str_error(ret)); + usb_log_debug("USBLEGCTLSTS: %" PRIx32 ".\n", usblegctlsts); + /* + * Zero SMI enables in legacy control register. + * It should prevent pre-OS code from + * interfering. NOTE: Three upper bits are WC + */ + ret = pci_config_space_write_32(parent_sess, + eecp + USBLEGCTLSTS_OFFSET, 0xe0000000); + CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) zero USBLEGCTLSTS.\n", ret); + udelay(10); + ret = pci_config_space_read_32(parent_sess, + eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); + CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS 2: %s.\n", + str_error(ret)); + usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIx32 ".\n", + usblegctlsts); + } + + /* Read again Legacy Support register */ + ret = pci_config_space_read_32(parent_sess, + eecp + USBLEGSUP_OFFSET, &usblegsup); + CHECK_RET_HANGUP_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", + str_error(ret)); + usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); + async_hangup(parent_sess); + return EOK; +#undef CHECK_RET_HANGUP_RETURN +} + +int disable_legacy(const ddf_dev_t *device, uintptr_t reg_base, size_t reg_size) +{ + assert(device); + +#define CHECK_RET_RETURN(ret, message...) \ + if (ret != EOK) { \ + usb_log_error(message); \ + return ret; \ + } else (void)0 + + /* Map EHCI registers */ + void *regs = NULL; + int ret = pio_enable((void*)reg_base, reg_size, ®s); + CHECK_RET_RETURN(ret, "Failed to map registers %p: %s.\n", + (void *) reg_base, str_error(ret)); + + const uint32_t hcc_params = + *(uint32_t*)(regs + HCC_PARAMS_OFFSET); + usb_log_debug("Value of hcc params register: %x.\n", hcc_params); + + /* Read value of EHCI Extended Capabilities Pointer + * position of EEC registers (points to PCI config space) */ + const uint32_t eecp = + (hcc_params >> HCC_PARAMS_EECP_OFFSET) & HCC_PARAMS_EECP_MASK; + usb_log_debug("Value of EECP: %x.\n", eecp); + + ret = disable_extended_caps(device, eecp); + CHECK_RET_RETURN(ret, "Failed to disable extended capabilities: %s.\n", + str_error(ret)); + +#undef CHECK_RET_RETURN + + /* + * TURN OFF EHCI FOR NOW, DRIVER WILL REINITIALIZE IT IF NEEDED + */ + + /* Get size of capability registers in memory space. */ + const unsigned operation_offset = *(uint8_t*)regs; + usb_log_debug("USBCMD offset: %d.\n", operation_offset); + + /* Zero USBCMD register. */ + volatile uint32_t *usbcmd = + (uint32_t*)((uint8_t*)regs + operation_offset + CMD_OFFSET); + volatile uint32_t *usbsts = + (uint32_t*)((uint8_t*)regs + operation_offset + STS_OFFSET); + volatile uint32_t *usbconf = + (uint32_t*)((uint8_t*)regs + operation_offset + CFG_OFFSET); + volatile uint32_t *usbint = + (uint32_t*)((uint8_t*)regs + operation_offset + INT_OFFSET); + usb_log_debug("USBCMD value: %x.\n", *usbcmd); + if (*usbcmd & USBCMD_RUN) { + *usbsts = 0x3f; /* ack all interrupts */ + *usbint = 0; /* disable all interrutps */ + *usbconf = 0; /* relase control of RH ports */ + + *usbcmd = 0; + /* Wait until hc is halted */ + while ((*usbsts & USBSTS_HALTED) == 0); + usb_log_info("EHCI turned off.\n"); + } else { + usb_log_info("EHCI was not running.\n"); + } + usb_log_debug("Registers: \n" + "\t USBCMD: %x(0x00080000 = at least 1ms between interrupts)\n" + "\t USBSTS: %x(0x00001000 = HC halted)\n" + "\t USBINT: %x(0x0 = no interrupts).\n" + "\t CONFIG: %x(0x0 = ports controlled by companion hc).\n", + *usbcmd, *usbsts, *usbint, *usbconf); + + return ret; +} + +/** + * @} + */ Index: uspace/drv/bus/usb/ehci/res.h =================================================================== --- uspace/drv/bus/usb/ehci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/ehci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2011 Vojtech Horky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup drvusbehci + * @{ + */ +/** @file + * PCI related functions needed by EHCI driver. + */ +#ifndef DRV_EHCI_PCI_H +#define DRV_EHCI_PCI_H + +#include + +int get_my_registers(const ddf_dev_t *, uintptr_t *, size_t *, int *); +int enable_interrupts(const ddf_dev_t *); +int disable_legacy(const ddf_dev_t *, uintptr_t, size_t); + +#endif +/** + * @} + */ + Index: uspace/drv/bus/usb/ohci/Makefile =================================================================== --- uspace/drv/bus/usb/ohci/Makefile (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ohci/Makefile (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -50,5 +50,5 @@ ohci_batch.c \ ohci_endpoint.c \ - pci.c \ + res.c \ root_hub.c \ hw_struct/endpoint_descriptor.c \ Index: uspace/drv/bus/usb/ohci/hw_struct/hcca.h =================================================================== --- uspace/drv/bus/usb/ohci/hw_struct/hcca.h (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ohci/hw_struct/hcca.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -46,6 +46,6 @@ uint16_t pad1; uint32_t done_head; - uint32_t reserved[29]; -} __attribute__((packed, aligned)) hcca_t; + uint32_t reserved[30]; +} hcca_t; static inline void * hcca_get(void) Index: uspace/drv/bus/usb/ohci/ohci.c =================================================================== --- uspace/drv/bus/usb/ohci/ohci.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ohci/ohci.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -42,5 +42,5 @@ #include "ohci.h" -#include "pci.h" +#include "res.h" #include "hc.h" @@ -180,5 +180,5 @@ int irq = 0; - ret = pci_get_my_registers(device, ®_base, ®_size, &irq); + ret = get_my_registers(device, ®_base, ®_size, &irq); CHECK_RET_DEST_FREE_RETURN(ret, "Failed to get register memory addresses for %" PRIun ": %s.\n", @@ -211,5 +211,5 @@ /* Try to enable interrupts */ bool interrupts = false; - ret = pci_enable_interrupts(device); + ret = enable_interrupts(device); if (ret != EOK) { usb_log_warning("Failed to enable interrupts: %s." Index: uspace/drv/bus/usb/ohci/ohci.ma =================================================================== --- uspace/drv/bus/usb/ohci/ohci.ma (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ohci/ohci.ma (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -1,1 +1,2 @@ +20 usb/host=ohci 10 pci/class=0c&subclass=03&progif=10 Index: uspace/drv/bus/usb/ohci/ohci_regs.h =================================================================== --- uspace/drv/bus/usb/ohci/ohci_regs.h (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/ohci/ohci_regs.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -228,5 +228,5 @@ #define RHPS_PRSC_FLAG (1 << 20) /* port reset status change WC */ #define RHPS_CHANGE_WC_MASK 0x1f0000 -} __attribute__((packed)) ohci_regs_t; +} ohci_regs_t; #endif /** Index: uspace/drv/bus/usb/ohci/pci.c =================================================================== --- uspace/drv/bus/usb/ohci/pci.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,116 +1,0 @@ -/* - * Copyright (c) 2011 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @addtogroup drvusbohci - * @{ - */ -/** - * @file - * PCI related functions needed by the OHCI driver. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "pci.h" - -/** Get address of registers and IRQ for given device. - * - * @param[in] dev Device asking for the addresses. - * @param[out] mem_reg_address Base address of the memory range. - * @param[out] mem_reg_size Size of the memory range. - * @param[out] irq_no IRQ assigned to the device. - * @return Error code. - */ -int pci_get_my_registers(ddf_dev_t *dev, - uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) -{ - assert(dev); - - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - hw_res_list_parsed_t hw_res; - hw_res_list_parsed_init(&hw_res); - const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); - async_hangup(parent_sess); - if (ret != EOK) { - return ret; - } - - /* We want one irq and one mem range. */ - if (hw_res.irqs.count != 1 || hw_res.mem_ranges.count != 1) { - hw_res_list_parsed_clean(&hw_res); - return EINVAL; - } - - if (mem_reg_address) - *mem_reg_address = hw_res.mem_ranges.ranges[0].address; - if (mem_reg_size) - *mem_reg_size = hw_res.mem_ranges.ranges[0].size; - if (irq_no) - *irq_no = hw_res.irqs.irqs[0]; - - hw_res_list_parsed_clean(&hw_res); - return EOK; -} - -/** Call the PCI driver with a request to enable interrupts - * - * @param[in] device Device asking for interrupts - * @return Error code. - */ -int pci_enable_interrupts(ddf_dev_t *device) -{ - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - bool enabled = hw_res_enable_interrupt(parent_sess); - async_hangup(parent_sess); - - return enabled ? EOK : EIO; -} - -/** - * @} - */ Index: uspace/drv/bus/usb/ohci/pci.h =================================================================== --- uspace/drv/bus/usb/ohci/pci.h (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2011 Vojtech Horky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup drvusbohci - * @{ - */ -/** @file - * PCI related functions needed by OHCI driver. - */ -#ifndef DRV_OHCI_PCI_H -#define DRV_OHCI_PCI_H - -#include - -int pci_get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *); -int pci_enable_interrupts(ddf_dev_t *); -int pci_disable_legacy(ddf_dev_t *); - -#endif -/** - * @} - */ - Index: uspace/drv/bus/usb/ohci/res.c =================================================================== --- uspace/drv/bus/usb/ohci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/ohci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2011 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @addtogroup drvusbohci + * @{ + */ +/** + * @file + * PCI related functions needed by the OHCI driver. + */ + +#include +#include +#include +#include + +#include + +#include "res.h" + +/** Get address of registers and IRQ for given device. + * + * @param[in] dev Device asking for the addresses. + * @param[out] mem_reg_address Base address of the memory range. + * @param[out] mem_reg_size Size of the memory range. + * @param[out] irq_no IRQ assigned to the device. + * @return Error code. + */ +int get_my_registers(const ddf_dev_t *dev, + uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) +{ + assert(dev); + + async_sess_t *parent_sess = + devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, + IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + hw_res_list_parsed_t hw_res; + hw_res_list_parsed_init(&hw_res); + const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); + async_hangup(parent_sess); + if (ret != EOK) { + return ret; + } + + /* We want one irq and one mem range. */ + if (hw_res.irqs.count != 1 || hw_res.mem_ranges.count != 1) { + hw_res_list_parsed_clean(&hw_res); + return EINVAL; + } + + if (mem_reg_address) + *mem_reg_address = hw_res.mem_ranges.ranges[0].address; + if (mem_reg_size) + *mem_reg_size = hw_res.mem_ranges.ranges[0].size; + if (irq_no) + *irq_no = hw_res.irqs.irqs[0]; + + hw_res_list_parsed_clean(&hw_res); + return EOK; +} + +/** Call the PCI driver with a request to enable interrupts + * + * @param[in] device Device asking for interrupts + * @return Error code. + */ +int enable_interrupts(const ddf_dev_t *device) +{ + async_sess_t *parent_sess = + devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, + IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + const bool enabled = hw_res_enable_interrupt(parent_sess); + async_hangup(parent_sess); + + return enabled ? EOK : EIO; +} + +/** + * @} + */ Index: uspace/drv/bus/usb/ohci/res.h =================================================================== --- uspace/drv/bus/usb/ohci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/ohci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2011 Vojtech Horky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup drvusbohci + * @{ + */ +/** @file + * PCI related functions needed by OHCI driver. + */ +#ifndef DRV_OHCI_RES_H +#define DRV_OHCI_RES_H + +#include + +int get_my_registers(const ddf_dev_t *, uintptr_t *, size_t *, int *); +int enable_interrupts(const ddf_dev_t *); + +#endif +/** + * @} + */ + Index: uspace/drv/bus/usb/uhci/Makefile =================================================================== --- uspace/drv/bus/usb/uhci/Makefile (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/uhci/Makefile (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -44,5 +44,5 @@ hc.c \ main.c \ - pci.c \ + res.c \ root_hub.c \ transfer_list.c \ Index: uspace/drv/bus/usb/uhci/pci.c =================================================================== --- uspace/drv/bus/usb/uhci/pci.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,146 +1,0 @@ -/* - * Copyright (c) 2011 Vojtech Horky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** - * @addtogroup drvusbuhcihc - * @{ - */ -/** - * @file - * PCI related functions needed by the UHCI driver. - */ - -#include -#include -#include -#include - -#include -#include - -#include "pci.h" - -/** Get I/O address of registers and IRQ for given device. - * - * @param[in] dev Device asking for the addresses. - * @param[out] io_reg_address Base address of the I/O range. - * @param[out] io_reg_size Size of the I/O range. - * @param[out] irq_no IRQ assigned to the device. - * @return Error code. - */ -int pci_get_my_registers(const ddf_dev_t *dev, - uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no) -{ - assert(dev); - assert(io_reg_address); - assert(io_reg_size); - assert(irq_no); - - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - hw_res_list_parsed_t hw_res; - hw_res_list_parsed_init(&hw_res); - const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); - async_hangup(parent_sess); - if (ret != EOK) { - return ret; - } - - /* We want one irq and one io range. */ - if (hw_res.irqs.count != 1 || hw_res.io_ranges.count != 1) { - hw_res_list_parsed_clean(&hw_res); - return EINVAL; - } - - if (io_reg_address) - *io_reg_address = hw_res.io_ranges.ranges[0].address; - if (io_reg_size) - *io_reg_size = hw_res.io_ranges.ranges[0].size; - if (irq_no) - *irq_no = hw_res.irqs.irqs[0]; - - hw_res_list_parsed_clean(&hw_res); - return EOK; -} -/*----------------------------------------------------------------------------*/ -/** Call the PCI driver with a request to enable interrupts - * - * @param[in] device Device asking for interrupts - * @return Error code. - */ -int pci_enable_interrupts(const ddf_dev_t *device) -{ - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - const bool enabled = hw_res_enable_interrupt(parent_sess); - async_hangup(parent_sess); - - return enabled ? EOK : EIO; -} -/*----------------------------------------------------------------------------*/ -/** Call the PCI driver with a request to clear legacy support register - * - * @param[in] device Device asking to disable interrupts - * @return Error code. - */ -int pci_disable_legacy(const ddf_dev_t *device) -{ - assert(device); - - async_sess_t *parent_sess = - devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, - IPC_FLAG_BLOCKING); - if (!parent_sess) - return ENOMEM; - - /* See UHCI design guide for these values p.45, - * write all WC bits in USB legacy register */ - const sysarg_t address = 0xc0; - const sysarg_t value = 0xaf00; - - async_exch_t *exch = async_exchange_begin(parent_sess); - - const int rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE), - IPC_M_CONFIG_SPACE_WRITE_16, address, value); - - async_exchange_end(exch); - async_hangup(parent_sess); - - return rc; -} - -/** - * @} - */ Index: uspace/drv/bus/usb/uhci/pci.h =================================================================== --- uspace/drv/bus/usb/uhci/pci.h (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2010 Vojtech Horky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup drvusbuhcihc - * @{ - */ -/** @file - * @brief UHCI driver PCI helper functions - */ -#ifndef DRV_UHCI_PCI_H -#define DRV_UHCI_PCI_H - -#include - -int pci_get_my_registers(const ddf_dev_t *, uintptr_t *, size_t *, int *); -int pci_enable_interrupts(const ddf_dev_t *); -int pci_disable_legacy(const ddf_dev_t *); - -#endif -/** - * @} - */ - Index: uspace/drv/bus/usb/uhci/res.c =================================================================== --- uspace/drv/bus/usb/uhci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/uhci/res.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2011 Vojtech Horky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** + * @addtogroup drvusbuhcihc + * @{ + */ +/** + * @file + * PCI related functions needed by the UHCI driver. + */ + +#include +#include +#include +#include +#include + +#include "res.h" + +/** Get I/O address of registers and IRQ for given device. + * + * @param[in] dev Device asking for the addresses. + * @param[out] io_reg_address Base address of the I/O range. + * @param[out] io_reg_size Size of the I/O range. + * @param[out] irq_no IRQ assigned to the device. + * @return Error code. + */ +int get_my_registers(const ddf_dev_t *dev, + uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no) +{ + assert(dev); + + async_sess_t *parent_sess = + devman_parent_device_connect(EXCHANGE_SERIALIZE, dev->handle, + IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + hw_res_list_parsed_t hw_res; + hw_res_list_parsed_init(&hw_res); + const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0); + async_hangup(parent_sess); + if (ret != EOK) { + return ret; + } + + /* We want one irq and one io range. */ + if (hw_res.irqs.count != 1 || hw_res.io_ranges.count != 1) { + hw_res_list_parsed_clean(&hw_res); + return EINVAL; + } + + if (io_reg_address) + *io_reg_address = hw_res.io_ranges.ranges[0].address; + if (io_reg_size) + *io_reg_size = hw_res.io_ranges.ranges[0].size; + if (irq_no) + *irq_no = hw_res.irqs.irqs[0]; + + hw_res_list_parsed_clean(&hw_res); + return EOK; +} +/*----------------------------------------------------------------------------*/ +/** Call the PCI driver with a request to enable interrupts + * + * @param[in] device Device asking for interrupts + * @return Error code. + */ +int enable_interrupts(const ddf_dev_t *device) +{ + async_sess_t *parent_sess = + devman_parent_device_connect(EXCHANGE_SERIALIZE, device->handle, + IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + const bool enabled = hw_res_enable_interrupt(parent_sess); + async_hangup(parent_sess); + + return enabled ? EOK : EIO; +} +/*----------------------------------------------------------------------------*/ +/** Call the PCI driver with a request to clear legacy support register + * + * @param[in] device Device asking to disable interrupts + * @return Error code. + */ +int disable_legacy(const ddf_dev_t *device) +{ + assert(device); + + async_sess_t *parent_sess = devman_parent_device_connect( + EXCHANGE_SERIALIZE, device->handle, IPC_FLAG_BLOCKING); + if (!parent_sess) + return ENOMEM; + + /* See UHCI design guide page 45 for these values. + * Write all WC bits in USB legacy register */ + const int rc = pci_config_space_write_16(parent_sess, 0xc0, 0xaf00); + + async_hangup(parent_sess); + return rc; +} + +/** + * @} + */ Index: uspace/drv/bus/usb/uhci/res.h =================================================================== --- uspace/drv/bus/usb/uhci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) +++ uspace/drv/bus/usb/uhci/res.h (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Vojtech Horky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup drvusbuhcihc + * @{ + */ +/** @file + * @brief UHCI driver PCI helper functions + */ +#ifndef DRV_UHCI_PCI_H +#define DRV_UHCI_PCI_H + +#include + +int get_my_registers(const ddf_dev_t *, uintptr_t *, size_t *, int *); +int enable_interrupts(const ddf_dev_t *); +int disable_legacy(const ddf_dev_t *); + +#endif +/** + * @} + */ + Index: uspace/drv/bus/usb/uhci/uhci.c =================================================================== --- uspace/drv/bus/usb/uhci/uhci.c (revision e882e3a80e03edfdac57ccf9854bee22d5a47032) +++ uspace/drv/bus/usb/uhci/uhci.c (revision fb8dcb4f762a0caef5c61ef0af0a62df56143c7d) @@ -41,6 +41,6 @@ #include "uhci.h" -#include "pci.h" - + +#include "res.h" #include "hc.h" #include "root_hub.h" @@ -49,12 +49,12 @@ * and USB root hub */ typedef struct uhci { - /** Pointer to DDF represenation of UHCI host controller */ + /** Pointer to DDF representation of UHCI host controller */ ddf_fun_t *hc_fun; - /** Pointer to DDF represenation of UHCI root hub */ + /** Pointer to DDF representation of UHCI root hub */ ddf_fun_t *rh_fun; - /** Internal driver's represenation of UHCI host controller */ + /** Internal driver's representation of UHCI host controller */ hc_t hc; - /** Internal driver's represenation of UHCI root hub */ + /** Internal driver's representation of UHCI root hub */ rh_t rh; } uhci_t; @@ -187,5 +187,5 @@ int irq = 0; - ret = pci_get_my_registers(device, ®_base, ®_size, &irq); + ret = get_my_registers(device, ®_base, ®_size, &irq); CHECK_RET_DEST_FREE_RETURN(ret, "Failed to get I/O addresses for %" PRIun ": %s.\n", @@ -194,5 +194,5 @@ (void *) reg_base, reg_size, irq); - ret = pci_disable_legacy(device); + ret = disable_legacy(device); CHECK_RET_DEST_FREE_RETURN(ret, "Failed to disable legacy USB: %s.\n", str_error(ret)); @@ -220,5 +220,5 @@ bool interrupts = false; - ret = pci_enable_interrupts(device); + ret = enable_interrupts(device); if (ret != EOK) { usb_log_warning("Failed to enable interrupts: %s."