Index: kernel/arch/sparc64/include/interrupt.h
===================================================================
--- kernel/arch/sparc64/include/interrupt.h	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/include/interrupt.h	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -48,6 +48,5 @@
 
 enum {
-	IPI_TLB_SHOOTDOWN = VECTOR_TLB_SHOOTDOWN_IPI,
-	IPI_DCACHE_SHOOTDOWN
+	IPI_TLB_SHOOTDOWN = VECTOR_TLB_SHOOTDOWN_IPI
 };		
 
Index: kernel/arch/sparc64/include/mm/cache.h
===================================================================
--- kernel/arch/sparc64/include/mm/cache.h	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/include/mm/cache.h	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -36,14 +36,4 @@
 #define KERN_sparc64_CACHE_H_
 
-#ifdef CONFIG_SMP
-extern void dcache_shootdown_start(void);
-extern void dcache_shootdown_finalize(void);
-extern void dcache_shootdown_ipi_recv(void);
-#else /* CONFIG_SMP */
-#define dcache_shootdown_start();
-#define dcache_shootdown_finalize();
-#define dcache_shootdown_ipi_recv();
-#endif /* CONFIG_SMP */
-
 extern void dcache_flush(void);
 
Index: kernel/arch/sparc64/src/mm/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/as.c	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/src/mm/as.c	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -49,8 +49,4 @@
 #include <macros.h>
 #endif /* CONFIG_TSB */
-
-#ifdef CONFIG_VIRT_IDX_DCACHE
-#include <arch/mm/cache.h>
-#endif /* CONFIG_VIRT_IDX_DCACHE */
 
 /** Architecture dependent address space init. */
@@ -163,21 +159,4 @@
 	dtsb_base_write(tsb_base.value);
 #endif
-#ifdef CONFIG_VIRT_IDX_DCACHE
-	if (as->dcache_flush_on_install) {
-		/*
-		 * Some mappings in this address space are illegal address
-		 * aliases. Upon their creation, the dcache_flush_on_install
-		 * flag was set.
-		 *
-		 * We are now obliged to flush the D-cache in order to guarantee
-		 * that there will be at most one cache line for each address
-		 * alias.
-		 *
-		 * This flush performs a cleanup after another address space in
-		 * which the alias might have existed.
-		 */
-		dcache_flush();
-	}
-#endif /* CONFIG_VIRT_IDX_DCACHE */
 }
 
@@ -214,24 +193,4 @@
 	}
 #endif
-#ifdef CONFIG_VIRT_IDX_DCACHE
-	if (as->dcache_flush_on_deinstall) {
-		/*
-		 * Some mappings in this address space are illegal address
-		 * aliases. Upon their creation, the dcache_flush_on_deinstall
-		 * flag was set.
-		 *
-		 * We are now obliged to flush the D-cache in order to guarantee
-		 * that there will be at most one cache line for each address
-		 * alias.
-		 *
-		 * This flush performs a cleanup after this address space. It is
-		 * necessary because other address spaces that contain the same
-		 * alias are not necessarily aware of the need to carry out the
-		 * cache flush. The only address spaces that are aware of it are
-		 * those that created the illegal alias. 
-		 */
-		dcache_flush();
-	}
-#endif /* CONFIG_VIRT_IDX_DCACHE */
 }
 
Index: kernel/arch/sparc64/src/mm/cache.c
===================================================================
--- kernel/arch/sparc64/src/mm/cache.c	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/src/mm/cache.c	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -32,66 +32,8 @@
 /**
  * @file
- * @brief	D-cache shootdown algorithm.
  */
 
 #include <arch/mm/cache.h>
 
-#ifdef CONFIG_SMP
-
-#include <smp/ipi.h>
-#include <arch/interrupt.h>
-#include <synch/spinlock.h>
-#include <arch.h>
-#include <debug.h>
-
-/**
- * This spinlock is used by the processors to synchronize during the D-cache
- * shootdown.
- */
-SPINLOCK_INITIALIZE(dcachelock);
-
-/** Initialize the D-cache shootdown sequence.
- *
- * Start the shootdown sequence by sending out an IPI and wait until all
- * processors spin on the dcachelock spinlock.
- */
-void dcache_shootdown_start(void)
-{
-	int i;
-
-	CPU->arch.dcache_active = 0;
-	spinlock_lock(&dcachelock);
-
-	ipi_broadcast(IPI_DCACHE_SHOOTDOWN);	
-
-busy_wait:
-	for (i = 0; i < config.cpu_count; i++)
-		if (cpus[i].arch.dcache_active)
-			goto busy_wait;
-}
-
-/** Finish the D-cache shootdown sequence. */
-void dcache_shootdown_finalize(void)
-{
-	spinlock_unlock(&dcachelock);
-	CPU->arch.dcache_active = 1;
-}
-
-/** Process the D-cache shootdown IPI. */
-void dcache_shootdown_ipi_recv(void)
-{
-	ASSERT(CPU);
-
-	CPU->arch.dcache_active = 0;
-	spinlock_lock(&dcachelock);
-	spinlock_unlock(&dcachelock);
-	
-	dcache_flush();
-
-	CPU->arch.dcache_active = 1;
-}
-
-#endif /* CONFIG_SMP */
-
 /** @}
  */
Index: kernel/arch/sparc64/src/mm/page.c
===================================================================
--- kernel/arch/sparc64/src/mm/page.c	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/src/mm/page.c	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -74,6 +74,7 @@
 		for (i = 0; i < bsp_locked_dtlb_entries; i++) {
 			dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
-				bsp_locked_dtlb_entry[i].phys_page, bsp_locked_dtlb_entry[i].pagesize_code,
-				true, false);
+				bsp_locked_dtlb_entry[i].phys_page,
+				bsp_locked_dtlb_entry[i].pagesize_code,	true,
+				false);
 		}
 #endif	
@@ -152,7 +153,10 @@
 		 * Second, save the information about the mapping for APs.
 		 */
-		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page = virtaddr + i*sizemap[order].increment;
-		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page = physaddr + i*sizemap[order].increment;
-		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code = sizemap[order].pagesize_code;
+		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
+			virtaddr + i*sizemap[order].increment;
+		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
+			physaddr + i*sizemap[order].increment;
+		bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
+			sizemap[order].pagesize_code;
 		bsp_locked_dtlb_entries++;
 #endif
Index: kernel/arch/sparc64/src/smp/ipi.c
===================================================================
--- kernel/arch/sparc64/src/smp/ipi.c	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/src/smp/ipi.c	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -39,5 +39,4 @@
 #include <config.h>
 #include <mm/tlb.h>
-#include <arch/mm/cache.h>
 #include <arch/interrupt.h>
 #include <arch/trap/interrupt.h>
@@ -122,7 +121,4 @@
 		func = tlb_shootdown_ipi_recv;
 		break;
-	case IPI_DCACHE_SHOOTDOWN:
-		func = dcache_shootdown_ipi_recv;
-		break;
 	default:
 		panic("Unknown IPI (%d).\n", ipi);
Index: kernel/arch/sparc64/src/trap/interrupt.c
===================================================================
--- kernel/arch/sparc64/src/trap/interrupt.c	(revision 4b43f86c9c581d38ec3c19b4620b11654c1ce635)
+++ kernel/arch/sparc64/src/trap/interrupt.c	(revision f8ddd176406660da88b0e9d63695413731cd58ff)
@@ -45,5 +45,4 @@
 #include <arch.h>
 #include <mm/tlb.h>
-#include <arch/mm/cache.h>
 #include <config.h>
 #include <synch/spinlock.h>
@@ -92,6 +91,4 @@
 		if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
 			tlb_shootdown_ipi_recv();
-		} else if (data0 == (uintptr_t) dcache_shootdown_ipi_recv) {
-			dcache_shootdown_ipi_recv();
 		}
 #endif