Index: arch/mips/Makefile.inc =================================================================== --- arch/mips/Makefile.inc (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/Makefile.inc (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,33 @@ +# decstation-ultrix target has been obsoleted in recent gcc compilers (3.1) and removed in (3.3) +MIPS_TARGET=decstation-ultrix + +MIPS_CC_DIR=/usr/local/mips/bin +MIPS_BINUTILS_DIR=/usr/local/mips/bin + +CC=$(MIPS_CC_DIR)/$(MIPS_TARGET)-gcc +AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as +LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld + +ASFLAGS=-EL -mips3 + +DEFS=-DARCH=$(ARCH) +CPPFLAGS=$(DEFS) -nostdinc -I../include +CFLAGS=$(CPPFLAGS) -EL -mips2 -G 0 -nostdlib -fno-builtin -Wmissing-prototypes -Werror -O2 +LFLAGS=-EL -mips2 -M -no-check-sections -T ../arch/mips/_link.ld + +arch_sources= \ + arch/start.S \ + arch/context.S \ + arch/panic.s \ + arch/mips.c \ + arch/fake.s \ + arch/putchar.c \ + arch/asm.s \ + arch/exception.c \ + arch/interrupt.c \ + arch/cache.c \ + arch/lib/memstr.c \ + arch/cpu/cpu.c \ + arch/mm/frame.c \ + arch/mm/page.c \ + arch/mm/tlb.c Index: arch/mips/_link.ld =================================================================== --- arch/mips/_link.ld (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/_link.ld (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,47 @@ +/* + * MIPS linker script + * + * kernel text + * kernel data + * + */ + +OUTPUT_FORMAT(binary) +ENTRY(kernel_image_start) + +SECTIONS { + .image 0x80000000: AT (0x80000000) { + ktext_start = .; + *(.text); + ktext_end = .; + + kdata_start = .; + *(.rdata); + *(.data); /* initialized data */ + *(.lit8); + *(.lit4); + *(.sdata); + *(.sbss); + *(.bss); /* uninitialized static variables */ + *(.scommon); + *(COMMON); /* global variables */ + kdata_end = .; + + } = 0x00000000 + + . = ABSOLUTE(hardcoded_ktext_size); + .patch_1 : { + LONG(ktext_end - ktext_start); + } + + . = ABSOLUTE(hardcoded_kdata_size); + .patch_2 : { + LONG(kdata_end - kdata_start); + } + + . = ABSOLUTE(hardcoded_load_address); + .patch_3 : { + LONG(0x80000000); + } + +} Index: arch/mips/boot/Makefile =================================================================== --- arch/mips/boot/Makefile (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/boot/Makefile (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,24 @@ +MIPS_BINUTILS_DIR=/usr/local/mips/bin +MIPS_TARGET=decstation-ultrix + +.PHONY: nothing build + +nothing: + +build: boot.bin + cp boot.bin ../../../src/load.bin + +AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as +LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld + +ASFLAGS=-mips2 -EL +LFLAGS=--oformat=binary -mips2 -EL -e start + +boot.bin: boot.o + $(LD) $(LFLAGS) boot.o -o $@ + +boot.o: + $(AS) boot.s -o $@ + +clean: + -rm *.o *.bin Index: arch/mips/boot/boot.s =================================================================== --- arch/mips/boot/boot.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/boot/boot.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,43 @@ +# +# Copyright (C) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.set noat +.set noreorder +.set nomacro + +start: + # move 0x80000000 to reg $8 + lui $8, 0x8000 + + # prepare stack + lui $29, 0x8100 + + j $8 + nop Index: arch/mips/include/asm.h =================================================================== --- arch/mips/include/asm.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/asm.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __MIPS_ASM_H__ +#define __MIPS_ASM_H__ + +#define cpu_sleep() ; + +#endif Index: arch/mips/include/asm/macro.h =================================================================== --- arch/mips/include/asm/macro.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/asm/macro.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * MIPS assembler macros + */ + +.macro REGISTERS_STORE r + sw $0,0(\r) + sw $1,4(\r) + sw $2,8(\r) # meaningless + sw $3,12(\r) + sw $4,16(\r) + sw $5,20(\r) + sw $6,24(\r) + sw $7,28(\r) + sw $8,32(\r) + sw $9,36(\r) + sw $10,40(\r) + sw $11,44(\r) + sw $12,48(\r) + sw $13,52(\r) + sw $14,56(\r) + sw $15,60(\r) + sw $16,64(\r) + sw $17,68(\r) + sw $18,72(\r) + sw $19,76(\r) + sw $20,80(\r) + sw $21,84(\r) + sw $22,88(\r) + sw $23,92(\r) + sw $24,96(\r) + sw $25,100(\r) + sw $26,104(\r) + sw $27,108(\r) + sw $28,112(\r) + sw $29,116(\r) + sw $30,120(\r) + sw $31,124(\r) +.endm + +.macro REGISTERS_LOAD r + lw $0,0(\r) + lw $1,4(\r) + lw $2,8(\r) # meaningless + lw $3,12(\r) + lw $4,16(\r) # this is ok, $4 == 16(\r) + lw $5,20(\r) + lw $6,24(\r) + lw $7,28(\r) + lw $8,32(\r) + lw $9,36(\r) + lw $10,40(\r) + lw $11,44(\r) + lw $12,48(\r) + lw $13,52(\r) + lw $14,56(\r) + lw $15,60(\r) + lw $16,64(\r) + lw $17,68(\r) + lw $18,72(\r) + lw $19,76(\r) + lw $20,80(\r) + lw $21,84(\r) + lw $22,88(\r) + lw $23,92(\r) + lw $24,96(\r) + lw $25,100(\r) + lw $26,104(\r) + lw $27,108(\r) + lw $28,112(\r) + lw $29,116(\r) + lw $30,120(\r) + lw $31,124(\r) +.endm Index: arch/mips/include/atomic.h =================================================================== --- arch/mips/include/atomic.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/atomic.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __MIPS_ATOMIC_H__ +#define __MIPS_ATOMIC_H__ + +#define atomic_inc(x) ((*x)++) +#define atomic_dec(x) ((*x)--) + +#endif Index: arch/mips/include/cache.h =================================================================== --- arch/mips/include/cache.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/cache.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __CACHE_H__ +#define __CACHE_H__ + +extern void cache_error(void); + +#endif Index: arch/mips/include/context.h =================================================================== --- arch/mips/include/context.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/context.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_CONTEXT_H__ +#define __mips_CONTEXT_H__ + +#include + +struct context { + __u32 r0; + __u32 r1; + __u32 r2; + __u32 r3; + __u32 r4; + __u32 r5; + __u32 r6; + __u32 r7; + __u32 r8; + __u32 r9; + __u32 r10; + __u32 r11; + __u32 r12; + __u32 r13; + __u32 r14; + __u32 r15; + __u32 r16; + __u32 r17; + __u32 r18; + __u32 r19; + __u32 r20; + __u32 r21; + __u32 r22; + __u32 r23; + __u32 r24; + __u32 r25; + __u32 r26; + __u32 r27; + __u32 r28; + __u32 sp; + __u32 r30; + __u32 pc; + __u32 pri; +}; + +#endif Index: arch/mips/include/cp0.h =================================================================== --- arch/mips/include/cp0.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/cp0.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __CP0_H__ +#define __CP0_H__ + +#include + +#define cp0_status_ie_enabled_bit (1<<0) +#define cp0_status_exl_exception_bit (1<<1) +#define cp0_status_erl_error_bit (1<<2) +#define cp0_status_bev_bootstrap_bit (1<<22) + +#define cp0_status_im7_shift 15 +/* + * Magic value for use in msim. + * On AMD Duron 800Mhz, this roughly seems like one us. + */ +#define cp0_compare_value 10000 + +extern __u32 cp0_index_read(void); +extern void cp0_idnex_write(__u32 val); + +extern __u32 cp0_random_read(void); + +extern __u32 cp0_entry_lo0_read(void); +extern void cp0_entry_lo0_write(__u32 val); + +extern __u32 cp0_entry_lo1_read(void); +extern void cp0_entry_lo1_write(__u32 val); + +extern __u32 cp0_context_read(void); +extern void cp0_context_write(__u32 val); + +extern __u32 cp0_pagemask_read(void); +extern void cp0_pagemask_write(__u32 val); + +extern __u32 cp0_wired_read(void); +extern void cp0_wired_write(__u32 val); + +extern __u32 cp0_badvaddr_read(void); + +extern volatile __u32 cp0_count_read(void); +extern void cp0_count_write(__u32 val); + +extern volatile __u32 cp0_entry_hi_read(void); +extern void cp0_entry_hi_write(__u32 val); + +extern volatile __u32 cp0_compare_read(void); +extern void cp0_compare_write(__u32 val); + +extern __u32 cp0_status_read(void); +extern void cp0_status_write(__u32 val); + +extern __u32 cp0_cause_read(void); +extern void cp0_cause_write(__u32 val); + +extern __u32 cp0_epc_read(void); +extern void cp0_epc_write(__u32 val); + +extern __u32 cp0_prid_read(void); + +extern void tlbp(void); +extern void tlbr(void); +extern void tlbwi(void); +extern void tlbwr(void); + +#endif Index: arch/mips/include/cpu.h =================================================================== --- arch/mips/include/cpu.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/cpu.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_CPU_H__ +#define __mips_CPU_H__ + +#include + +struct cpu_arch { + int imp_num; + int rev_num; +}; + +#endif Index: arch/mips/include/exception.h =================================================================== --- arch/mips/include/exception.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/exception.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __EXCEPTION_H__ +#define __EXCEPTION_H__ + +#define EXC_Int 0 +#define EXC_MOD 1 +#define EXC_TLBL 2 +#define EXC_TLBS 3 + +extern void exception(void); + +#endif Index: arch/mips/include/interrupt.h =================================================================== --- arch/mips/include/interrupt.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/interrupt.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __INTERRUPT_H__ +#define __INTERRUPT_H__ + +extern void interrupt(void); + +#endif Index: arch/mips/include/mm/frame.h =================================================================== --- arch/mips/include/mm/frame.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/mm/frame.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_FRAME_H__ +#define __mips_FRAME_H__ + +#define FRAME_SIZE 4096 + +extern void frame_arch_init(void); + +#endif Index: arch/mips/include/mm/page.h =================================================================== --- arch/mips/include/mm/page.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/mm/page.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_PAGE_H__ +#define __mips_PAGE_H__ + +#include + +#define PAGE_SIZE FRAME_SIZE + +#define KA2PA(x) ((x) - 0x80000000) +#define PA2KA(x) ((x) + 0x80000000) + +#define page_arch_init() ; + +#endif Index: arch/mips/include/mm/tlb.h =================================================================== --- arch/mips/include/mm/tlb.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/mm/tlb.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_TLB_H__ +#define __mips_TLB_H__ + +struct entry_lo { + unsigned g : 1; + unsigned v : 1; + unsigned d : 1; + unsigned c : 3; + unsigned pfn : 24; + unsigned : 2; +} __attribute__ ((packed)); + +struct entry_hi { + unsigned asid : 8; + unsigned : 4; + unsigned g : 1; + unsigned vpn2 : 19; +} __attribute__ ((packed)); + +struct page_mask { + unsigned : 13; + unsigned mask : 12; + unsigned : 7; +} __attribute__ ((packed)); + +struct tlb_entry { + struct entry_lo lo0; + struct entry_lo lo1; + struct entry_hi hi; + struct page_mask mask; +} __attribute__ ((packed)); + +extern void tlb_refill(void); +extern void tlb_invalid(void); + +#endif Index: arch/mips/include/mm/vm.h =================================================================== --- arch/mips/include/mm/vm.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/mm/vm.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_VM_H__ +#define __mips_VM_H__ + +#include + +#define KERNEL_ADDRESS_SPACE_START_ARCH (__address) 0x80000000 +#define KERNEL_ADDRESS_SPACE_END_ARCH (__address) 0xffffffff +#define USER_ADDRESS_SPACE_START_ARCH (__address) 0x00000000 +#define USER_ADDRESS_SPACE_END_ARCH (__address) 0x7fffffff + +#define UTEXT_ADDRESS_ARCH 0x00001000 +#define USTACK_ADDRESS_ARCH 0x7ffff000 +#define UDATA_ADDRESS_ARCH 0x01001000 + +#endif Index: arch/mips/include/thread.h =================================================================== --- arch/mips/include/thread.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/thread.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __mips_THREAD_H__ +#define __mips_THREAD_H__ + +#define ARCH_THREAD_DATA \ + pri_t saved_pri; \ + __u32 saved_epc; + +#endif Index: arch/mips/include/types.h =================================================================== --- arch/mips/include/types.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/include/types.h (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __TYPES_H__ +#define __TYPES_H__ + +#define NULL 0 + +typedef signed char __s8; + +typedef unsigned char __u8; +typedef unsigned short __u16; +typedef unsigned long __u32; +typedef long long __u64; + +typedef __u32 __address; + +typedef __u32 pri_t; + +#endif Index: arch/mips/src/asm.s =================================================================== --- arch/mips/src/asm.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/asm.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,157 @@ +# +# Copyright (C) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.macro cp0_read reg + mfc0 $2,\reg + j $31 + nop +.endm + +.macro cp0_write reg + mtc0 $4,\reg + j $31 + nop +.endm + +.set noat +.set noreorder +.set nomacro + +.global cp0_index_read +.global cp0_index_write +.global cp0_random_read +.global cp0_entry_lo0_read +.global cp0_entry_lo0_write +.global cp0_entry_lo1_read +.global cp0_entry_lo1_write +.global cp0_context_read +.global cp0_context_write +.global cp0_pagemask_read +.global cp0_pagemask_write +.global cp0_wired_read +.global cp0_wired_write +.global cp0_badvaddr_read +.global cp0_count_read +.global cp0_count_write +.global cp0_hi_read +.global cp0_hi_write +.global cp0_compare_read +.global cp0_compare_write +.global cp0_status_read +.global cp0_status_write +.global cp0_cause_read +.global cp0_epc_read +.global cp0_epc_write +.global cp0_prid_read + +cp0_index_read: cp0_read $0 +cp0_index_write: cp0_write $0 + +cp0_random_read: cp0_read $1 + +cp0_entry_lo0_read: cp0_read $2 +cp0_entry_lo0_write: cp0_write $2 + +cp0_entry_lo1_read: cp0_read $3 +cp0_entry_lo1_write: cp0_write $3 + +cp0_context_read: cp0_read $4 +cp0_context_write: cp0_write $4 + +cp0_pagemask_read: cp0_read $5 +cp0_pagemask_write: cp0_write $5 + +cp0_wired_read: cp0_read $6 +cp0_wired_write: cp0_write $6 + +cp0_badvaddr_read: cp0_read $8 + +cp0_count_read: cp0_read $9 +cp0_count_write: cp0_write $9 + +cp0_entry_hi_read: cp0_read $10 +cp0_entry_hi_write: cp0_write $10 + +cp0_compare_read: cp0_read $11 +cp0_compare_write: cp0_write $11 + +cp0_status_read: cp0_read $12 +cp0_status_write: cp0_write $12 + +cp0_cause_read: cp0_read $13 + +cp0_epc_read: cp0_read $14 +cp0_epc_write: cp0_write $14 + +cp0_prid_read: cp0_read $15 + + +.global tlbp +tlbp: + tlbp + j $31 + nop + +.global tlbr +tlbr: + tlbr + j $31 + nop + +.global tlbwi +tlbwi: + tlbwi + j $31 + nop + +.global tlbwr +tlbwr: + tlbwr + j $31 + nop + +.global cpu_halt +cpu_halt: + j cpu_halt + nop + + +# THIS IS USERSPACE CODE +.global utext +utext: + j $31 + nop +utext_end: + +.data +.global utext_size +utext_size: + .long utext_end-utext + Index: arch/mips/src/cache.c =================================================================== --- arch/mips/src/cache.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/cache.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +void cache_error(void) +{ + panic(PANIC "cache_error exception\n"); +} Index: arch/mips/src/context.S =================================================================== --- arch/mips/src/context.S (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/context.S (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,52 @@ +# +# Copyright (C) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include + +.text + +.set noat +.set noreorder +.set nomacro + +.global context_save +.global context_restore + +context_save: + REGISTERS_STORE $4 + + # context_save returns 1 + j $31 + li $2, 1 + +context_restore: + REGISTERS_LOAD $4 + + # context_restore returns 0 + j $31 + xor $2, $2 Index: arch/mips/src/cpu/cpu.c =================================================================== --- arch/mips/src/cpu/cpu.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/cpu/cpu.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +#include + +#include + +#include + +struct { + char *vendor; + char *model; +} imp_data[] = { + { "Invalid", "Invalid" }, /* 0x00 */ + { "MIPS", "R2000" }, /* 0x01 */ + { "MIPS", "R3000" }, /* 0x02 */ + { "MIPS", "R6000" }, /* 0x03 */ + { "MIPS", " R4000/R4400" }, /* 0x04 */ + { "LSI Logic", "R3000" }, /* 0x05 */ + { "MIPS", "R6000A" }, /* 0x06 */ + { "IDT", "3051/3052" }, /* 0x07 */ + { "Invalid", "Invalid" }, /* 0x08 */ + { "MIPS", "R10000/T5" }, /* 0x09 */ + { "MIPS", "R4200" }, /* 0x0a */ + { "Unknown", "Unknown" }, /* 0x0b */ + { "Unknown", "Unknown" }, /* 0x0c */ + { "Invalid", "Invalid" }, /* 0x0d */ + { "Invalid", "Invalid" }, /* 0x0e */ + { "Invalid", "Invalid" }, /* 0x0f */ + { "MIPS", "R8000" }, /* 0x10 */ + { "Invalid", "Invalid" }, /* 0x11 */ + { "Invalid", "Invalid" }, /* 0x12 */ + { "Invalid", "Invalid" }, /* 0x13 */ + { "Invalid", "Invalid" }, /* 0x14 */ + { "Invalid", "Invalid" }, /* 0x15 */ + { "Invalid", "Invalid" }, /* 0x16 */ + { "Invalid", "Invalid" }, /* 0x17 */ + { "Invalid", "Invalid" }, /* 0x18 */ + { "Invalid", "Invalid" }, /* 0x19 */ + { "Invalid", "Invalid" }, /* 0x1a */ + { "Invalid", "Invalid" }, /* 0x1b */ + { "Invalid", "Invalid" }, /* 0x1c */ + { "Invalid", "Invalid" }, /* 0x1d */ + { "Invalid", "Invalid" }, /* 0x1e */ + { "Invalid", "Invalid" }, /* 0x1f */ + { "QED", "R4600" }, /* 0x20 */ + { "Sony", "R3000" }, /* 0x21 */ + { "Toshiba", "R3000" }, /* 0x22 */ + { "NKK", "R3000" } /* 0x23 */ +}; + +void cpu_arch_init(void) +{ +} + +void cpu_identify(void) +{ + the->cpu->arch.rev_num = cp0_prid_read() & 0xff; + the->cpu->arch.imp_num = (cp0_prid_read() >> 8) & 0xff; +} + +void cpu_print_report(cpu_t *m) +{ + printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n", + m->id, imp_data[m->arch.imp_num].vendor, imp_data[m->arch.imp_num].model, m->arch.rev_num >> 4, m->arch.rev_num & 0xf, m->arch.imp_num); +} Index: arch/mips/src/exception.c =================================================================== --- arch/mips/src/exception.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/exception.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include + +void exception(void) +{ + int excno; + __u32 epc; + pri_t pri; + + pri = cpu_priority_high(); + epc = cp0_epc_read(); + cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit); + + if (the->thread) { + the->thread->saved_pri = pri; + the->thread->saved_epc = epc; + } + /* decode exception number and process the exception */ + switch(excno = (cp0_cause_read()>>2)&0x1f) { + case EXC_Int: interrupt(); break; + case EXC_TLBL: + case EXC_TLBS: tlb_invalid(); break; + default: panic(PANIC "unhandled exception %d\n", excno); break; + } + + if (the->thread) { + pri = the->thread->saved_pri; + epc = the->thread->saved_epc; + } + + cp0_epc_write(epc); + cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit); + cpu_priority_restore(pri); +} Index: arch/mips/src/fake.s =================================================================== --- arch/mips/src/fake.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/fake.s (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,40 @@ +# +# Copyright (C) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text +.set noat + +.global calibrate_delay_loop +.global asm_delay_loop +.global userspace + +userspace: +calibrate_delay_loop: +asm_delay_loop: + j $31 + nop Index: arch/mips/src/interrupt.c =================================================================== --- arch/mips/src/interrupt.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) +++ arch/mips/src/interrupt.c (revision f761f1eb635bfe9a5deaf70a0f0a51aa8d2f5f22) @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include