Index: kernel/arch/sparc64/include/arch/asm.h
===================================================================
--- kernel/arch/sparc64/include/arch/asm.h	(revision 76d0981d8dda2b7d698201a93e0c555e99215ba5)
+++ kernel/arch/sparc64/include/arch/asm.h	(revision f712a858b9463dae30e9eee5ef1ccc54ae618f02)
@@ -93,6 +93,6 @@
 
 	asm volatile (
-		"rdpr %%pstate, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%pstate, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -108,7 +108,7 @@
 {
 	asm volatile (
-		"wrpr %[v], %[zero], %%pstate\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wrpr %[v], %[zero], %%pstate\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -124,6 +124,6 @@
 
 	asm volatile (
-		"rd %%tick_cmpr, %[v]\n"
-		: [v] "=r" (v)
+	    "rd %%tick_cmpr, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -139,7 +139,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%tick_cmpr\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%tick_cmpr\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -155,6 +155,6 @@
 
 	asm volatile (
-		"rd %%asr25, %[v]\n"
-		: [v] "=r" (v)
+	    "rd %%asr25, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -170,7 +170,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%asr25\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%asr25\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -186,6 +186,6 @@
 
 	asm volatile (
-		"rdpr %%tick, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%tick, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -201,7 +201,7 @@
 {
 	asm volatile (
-		"wrpr %[v], %[zero], %%tick\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wrpr %[v], %[zero], %%tick\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -217,6 +217,6 @@
 
 	asm volatile (
-		"rd %%fprs, %[v]\n"
-		: [v] "=r" (v)
+	    "rd %%fprs, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -232,7 +232,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%fprs\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%fprs\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -248,6 +248,6 @@
 
 	asm volatile (
-		"rd %%softint, %[v]\n"
-		: [v] "=r" (v)
+	    "rd %%softint, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -263,7 +263,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%softint\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%softint\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -279,7 +279,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%clear_softint\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%clear_softint\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -295,7 +295,7 @@
 {
 	asm volatile (
-		"wr %[v], %[zero], %%set_softint\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wr %[v], %[zero], %%set_softint\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -309,5 +309,6 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_enable(void) {
+NO_TRACE static inline ipl_t interrupts_enable(void)
+{
 	pstate_reg_t pstate;
 	uint64_t value = pstate_read();
@@ -328,5 +329,6 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_disable(void) {
+NO_TRACE static inline ipl_t interrupts_disable(void)
+{
 	pstate_reg_t pstate;
 	uint64_t value = pstate_read();
@@ -346,5 +348,6 @@
  *
  */
-NO_TRACE static inline void interrupts_restore(ipl_t ipl) {
+NO_TRACE static inline void interrupts_restore(ipl_t ipl)
+{
 	pstate_reg_t pstate;
 
@@ -361,5 +364,6 @@
  *
  */
-NO_TRACE static inline ipl_t interrupts_read(void) {
+NO_TRACE static inline ipl_t interrupts_read(void)
+{
 	return (ipl_t) pstate_read();
 }
@@ -390,7 +394,7 @@
 
 	asm volatile (
-		"add %%sp, %[stack_bias], %[unbiased_sp]\n"
-		: [unbiased_sp] "=r" (unbiased_sp)
-		: [stack_bias] "i" (STACK_BIAS)
+	    "add %%sp, %[stack_bias], %[unbiased_sp]\n"
+	    : [unbiased_sp] "=r" (unbiased_sp)
+	    : [stack_bias] "i" (STACK_BIAS)
 	);
 
@@ -408,6 +412,6 @@
 
 	asm volatile (
-		"rdpr %%ver, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%ver, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -425,6 +429,6 @@
 
 	asm volatile (
-		"rdpr %%tpc, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%tpc, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -442,6 +446,6 @@
 
 	asm volatile (
-		"rdpr %%tl, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%tl, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -459,6 +463,6 @@
 
 	asm volatile (
-		"rdpr %%tba, %[v]\n"
-		: [v] "=r" (v)
+	    "rdpr %%tba, %[v]\n"
+	    : [v] "=r" (v)
 	);
 
@@ -474,7 +478,7 @@
 {
 	asm volatile (
-		"wrpr %[v], %[zero], %%tba\n"
-		:: [v] "r" (v),
-		   [zero] "i" (0)
+	    "wrpr %[v], %[zero], %%tba\n"
+	    :: [v] "r" (v),
+	      [zero] "i" (0)
 	);
 }
@@ -494,8 +498,8 @@
 
 	asm volatile (
-		"ldxa [%[va]] %[asi], %[v]\n"
-		: [v] "=r" (v)
-		: [va] "r" (va),
-		  [asi] "i" ((unsigned int) asi)
+	    "ldxa [%[va]] %[asi], %[v]\n"
+	    : [v] "=r" (v)
+	    : [va] "r" (va),
+	      [asi] "i" ((unsigned int) asi)
 	);
 
@@ -513,9 +517,9 @@
 {
 	asm volatile (
-		"stxa %[v], [%[va]] %[asi]\n"
-		:: [v] "r" (v),
-		   [va] "r" (va),
-		   [asi] "i" ((unsigned int) asi)
-		: "memory"
+	    "stxa %[v], [%[va]] %[asi]\n"
+	    :: [v] "r" (v),
+	      [va] "r" (va),
+	      [asi] "i" ((unsigned int) asi)
+	    : "memory"
 	);
 }
Index: kernel/arch/sparc64/src/fpu_context.c
===================================================================
--- kernel/arch/sparc64/src/fpu_context.c	(revision 76d0981d8dda2b7d698201a93e0c555e99215ba5)
+++ kernel/arch/sparc64/src/fpu_context.c	(revision f712a858b9463dae30e9eee5ef1ccc54ae618f02)
@@ -41,24 +41,24 @@
 {
 	asm volatile (
-		"std %%f0, %0\n"
-		"std %%f2, %1\n"
-		"std %%f4, %2\n"
-		"std %%f6, %3\n"
-		"std %%f8, %4\n"
-		"std %%f10, %5\n"
-		"std %%f12, %6\n"
-		"std %%f14, %7\n"
-		"std %%f16, %8\n"
-		"std %%f18, %9\n"
-		"std %%f20, %10\n"
-		"std %%f22, %11\n"
-		"std %%f24, %12\n"
-		"std %%f26, %13\n"
-		"std %%f28, %14\n"
-		"std %%f30, %15\n"
-		: "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]),
-		  "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]),
-		  "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]),
-		  "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15])
+	    "std %%f0, %0\n"
+	    "std %%f2, %1\n"
+	    "std %%f4, %2\n"
+	    "std %%f6, %3\n"
+	    "std %%f8, %4\n"
+	    "std %%f10, %5\n"
+	    "std %%f12, %6\n"
+	    "std %%f14, %7\n"
+	    "std %%f16, %8\n"
+	    "std %%f18, %9\n"
+	    "std %%f20, %10\n"
+	    "std %%f22, %11\n"
+	    "std %%f24, %12\n"
+	    "std %%f26, %13\n"
+	    "std %%f28, %14\n"
+	    "std %%f30, %15\n"
+	    : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]),
+	      "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]),
+	      "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]),
+	      "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15])
 	);
 
@@ -69,24 +69,24 @@
 
 	asm volatile (
-		"std %%f32, %0\n"
-		"std %%f34, %1\n"
-		"std %%f36, %2\n"
-		"std %%f38, %3\n"
-		"std %%f40, %4\n"
-		"std %%f42, %5\n"
-		"std %%f44, %6\n"
-		"std %%f46, %7\n"
-		"std %%f48, %8\n"
-		"std %%f50, %9\n"
-		"std %%f52, %10\n"
-		"std %%f54, %11\n"
-		"std %%f56, %12\n"
-		"std %%f58, %13\n"
-		"std %%f60, %14\n"
-		"std %%f62, %15\n"
-		: "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]),
-		  "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]),
-		  "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]),
-		  "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31])
+	    "std %%f32, %0\n"
+	    "std %%f34, %1\n"
+	    "std %%f36, %2\n"
+	    "std %%f38, %3\n"
+	    "std %%f40, %4\n"
+	    "std %%f42, %5\n"
+	    "std %%f44, %6\n"
+	    "std %%f46, %7\n"
+	    "std %%f48, %8\n"
+	    "std %%f50, %9\n"
+	    "std %%f52, %10\n"
+	    "std %%f54, %11\n"
+	    "std %%f56, %12\n"
+	    "std %%f58, %13\n"
+	    "std %%f60, %14\n"
+	    "std %%f62, %15\n"
+	    : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]),
+	      "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]),
+	      "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]),
+	      "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31])
 	);
 
@@ -97,25 +97,25 @@
 {
 	asm volatile (
-		"ldd %0, %%f0\n"
-		"ldd %1, %%f2\n"
-		"ldd %2, %%f4\n"
-		"ldd %3, %%f6\n"
-		"ldd %4, %%f8\n"
-		"ldd %5, %%f10\n"
-		"ldd %6, %%f12\n"
-		"ldd %7, %%f14\n"
-		"ldd %8, %%f16\n"
-		"ldd %9, %%f18\n"
-		"ldd %10, %%f20\n"
-		"ldd %11, %%f22\n"
-		"ldd %12, %%f24\n"
-		"ldd %13, %%f26\n"
-		"ldd %14, %%f28\n"
-		"ldd %15, %%f30\n"
-		:
-		: "m" (fctx->d[0]), "m" (fctx->d[1]), "m" (fctx->d[2]), "m" (fctx->d[3]),
-		  "m" (fctx->d[4]), "m" (fctx->d[5]), "m" (fctx->d[6]), "m" (fctx->d[7]),
-		  "m" (fctx->d[8]), "m" (fctx->d[9]), "m" (fctx->d[10]), "m" (fctx->d[11]),
-		  "m" (fctx->d[12]), "m" (fctx->d[13]), "m" (fctx->d[14]), "m" (fctx->d[15])
+	    "ldd %0, %%f0\n"
+	    "ldd %1, %%f2\n"
+	    "ldd %2, %%f4\n"
+	    "ldd %3, %%f6\n"
+	    "ldd %4, %%f8\n"
+	    "ldd %5, %%f10\n"
+	    "ldd %6, %%f12\n"
+	    "ldd %7, %%f14\n"
+	    "ldd %8, %%f16\n"
+	    "ldd %9, %%f18\n"
+	    "ldd %10, %%f20\n"
+	    "ldd %11, %%f22\n"
+	    "ldd %12, %%f24\n"
+	    "ldd %13, %%f26\n"
+	    "ldd %14, %%f28\n"
+	    "ldd %15, %%f30\n"
+	    :
+	    : "m" (fctx->d[0]), "m" (fctx->d[1]), "m" (fctx->d[2]), "m" (fctx->d[3]),
+	      "m" (fctx->d[4]), "m" (fctx->d[5]), "m" (fctx->d[6]), "m" (fctx->d[7]),
+	      "m" (fctx->d[8]), "m" (fctx->d[9]), "m" (fctx->d[10]), "m" (fctx->d[11]),
+	      "m" (fctx->d[12]), "m" (fctx->d[13]), "m" (fctx->d[14]), "m" (fctx->d[15])
 	);
 
@@ -126,25 +126,25 @@
 
 	asm volatile (
-		"ldd %0, %%f32\n"
-		"ldd %1, %%f34\n"
-		"ldd %2, %%f36\n"
-		"ldd %3, %%f38\n"
-		"ldd %4, %%f40\n"
-		"ldd %5, %%f42\n"
-		"ldd %6, %%f44\n"
-		"ldd %7, %%f46\n"
-		"ldd %8, %%f48\n"
-		"ldd %9, %%f50\n"
-		"ldd %10, %%f52\n"
-		"ldd %11, %%f54\n"
-		"ldd %12, %%f56\n"
-		"ldd %13, %%f58\n"
-		"ldd %14, %%f60\n"
-		"ldd %15, %%f62\n"
-		:
-		: "m" (fctx->d[16]), "m" (fctx->d[17]), "m" (fctx->d[18]), "m" (fctx->d[19]),
-		  "m" (fctx->d[20]), "m" (fctx->d[21]), "m" (fctx->d[22]), "m" (fctx->d[23]),
-		  "m" (fctx->d[24]), "m" (fctx->d[25]), "m" (fctx->d[26]), "m" (fctx->d[27]),
-		  "m" (fctx->d[28]), "m" (fctx->d[29]), "m" (fctx->d[30]), "m" (fctx->d[31])
+	    "ldd %0, %%f32\n"
+	    "ldd %1, %%f34\n"
+	    "ldd %2, %%f36\n"
+	    "ldd %3, %%f38\n"
+	    "ldd %4, %%f40\n"
+	    "ldd %5, %%f42\n"
+	    "ldd %6, %%f44\n"
+	    "ldd %7, %%f46\n"
+	    "ldd %8, %%f48\n"
+	    "ldd %9, %%f50\n"
+	    "ldd %10, %%f52\n"
+	    "ldd %11, %%f54\n"
+	    "ldd %12, %%f56\n"
+	    "ldd %13, %%f58\n"
+	    "ldd %14, %%f60\n"
+	    "ldd %15, %%f62\n"
+	    :
+	    : "m" (fctx->d[16]), "m" (fctx->d[17]), "m" (fctx->d[18]), "m" (fctx->d[19]),
+	      "m" (fctx->d[20]), "m" (fctx->d[21]), "m" (fctx->d[22]), "m" (fctx->d[23]),
+	      "m" (fctx->d[24]), "m" (fctx->d[25]), "m" (fctx->d[26]), "m" (fctx->d[27]),
+	      "m" (fctx->d[28]), "m" (fctx->d[29]), "m" (fctx->d[30]), "m" (fctx->d[31])
 	);
 
Index: kernel/arch/sparc64/src/sun4v/md.c
===================================================================
--- kernel/arch/sparc64/src/sun4v/md.c	(revision 76d0981d8dda2b7d698201a93e0c555e99215ba5)
+++ kernel/arch/sparc64/src/sun4v/md.c	(revision f712a858b9463dae30e9eee5ef1ccc54ae618f02)
@@ -62,5 +62,5 @@
 	uint32_t name_blk_sz;		/**< Size in bytes of name block */
 	uint32_t data_blk_sz;		/**< Size in bytes of data block */
-} __attribute__ ((packed)) md_header_t;
+} __attribute__((packed)) md_header_t;
 
 /** machine description element (in the node block) */
@@ -91,5 +91,5 @@
 		uint64_t val;
 	} d;
-} __attribute__ ((packed)) md_element_t;
+} __attribute__((packed)) md_element_t;
 
 /** index of the element within the node block */
@@ -98,5 +98,5 @@
 /** buffer to which the machine description will be saved */
 static uint8_t mach_desc[MD_MAX_SIZE]
-	 __attribute__ ((aligned (16)));
+    __attribute__((aligned(16)));
 
 
@@ -129,5 +129,5 @@
  */
 bool md_get_integer_property(md_node_t node, const char *key,
-	uint64_t *result)
+    uint64_t *result)
 {
 	element_idx_t idx = node;
@@ -152,5 +152,5 @@
  */
 bool md_get_string_property(md_node_t node, const char *key,
-	const char **result)
+    const char **result)
 {
 	md_header_t *md_header = (md_header_t *) mach_desc;
