Index: kernel/arch/amd64/include/arch/interrupt.h
===================================================================
--- kernel/arch/amd64/include/arch/interrupt.h	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/amd64/include/arch/interrupt.h	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -61,6 +61,7 @@
 /* NS16550 at COM1 */
 #define IRQ_NS16550   4
-#define IRQ_PIC_SPUR  7
+#define IRQ_PIC0_SPUR 7
 #define IRQ_MOUSE     12
+#define IRQ_PIC1_SPUR 15
 
 /* This one must have four least significant bits set to ones */
@@ -77,5 +78,6 @@
 #define VECTOR_PF                 (IVT_EXCBASE + EXC_PF)
 #define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
-#define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
+#define VECTOR_PIC0_SPUR          (IVT_IRQBASE + IRQ_PIC0_SPUR)
+#define VECTOR_PIC1_SPUR          (IVT_IRQBASE + IRQ_PIC1_SPUR)
 #define VECTOR_SYSCALL            IVT_FREEBASE
 #define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
Index: kernel/arch/amd64/src/interrupt.c
===================================================================
--- kernel/arch/amd64/src/interrupt.c	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/amd64/src/interrupt.c	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -172,5 +172,7 @@
 	bool ack = false;
 	assert(inum < IRQ_COUNT);
-	assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
+	assert(inum != IRQ_PIC0_SPUR);
+	assert(inum != IRQ_PIC1_SPUR);
+	assert(inum != IRQ_PIC1);
 
 	irq_t *irq = irq_dispatch_and_lock(inum);
@@ -201,4 +203,15 @@
 }
 
+static void pic_spurious(unsigned int n, istate_t *istate)
+{
+	/*
+	 * XXX: Examine ISR to figure out whether this is indeed a spurious
+	 *      or actual IRQ.
+	 */
+#ifdef CONFIG_DEBUG
+	log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
+#endif
+}
+
 void interrupt_init(void)
 {
@@ -209,5 +222,6 @@
 
 	for (i = 0; i < IRQ_COUNT; i++) {
-		if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
+		if ((i != IRQ_PIC0_SPUR) && (i != IRQ_PIC1_SPUR)
+		    && (i != IRQ_PIC1))
 			exc_register(IVT_IRQBASE + i, "irq", true,
 			    (iroutine_t) irq_interrupt);
@@ -218,4 +232,8 @@
 	exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
 	exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
+	exc_register(VECTOR_PIC0_SPUR, "pic0_spurious", true,
+	    (iroutine_t) pic_spurious);
+	exc_register(VECTOR_PIC1_SPUR, "pic1_spurious", true,
+	    (iroutine_t) pic_spurious);
 
 #ifdef CONFIG_SMP
Index: kernel/arch/ia32/include/arch/interrupt.h
===================================================================
--- kernel/arch/ia32/include/arch/interrupt.h	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/ia32/include/arch/interrupt.h	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -63,6 +63,7 @@
 /* NS16550 at COM1 */
 #define IRQ_NS16550   4
-#define IRQ_PIC_SPUR  7
+#define IRQ_PIC0_SPUR 7
 #define IRQ_MOUSE     12
+#define IRQ_PIC1_SPUR 15
 
 /* This one must have four least significant bits set to ones */
@@ -81,5 +82,6 @@
 #define VECTOR_XM                 (IVT_EXCBASE + EXC_XM)
 #define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
-#define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
+#define VECTOR_PIC0_SPUR          (IVT_IRQBASE + IRQ_PIC0_SPUR)
+#define VECTOR_PIC1_SPUR          (IVT_IRQBASE + IRQ_PIC1_SPUR)
 #define VECTOR_SYSCALL            IVT_FREEBASE
 #define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
Index: kernel/arch/ia32/src/interrupt.c
===================================================================
--- kernel/arch/ia32/src/interrupt.c	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/ia32/src/interrupt.c	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -192,5 +192,7 @@
 	bool ack = false;
 	assert(inum < IRQ_COUNT);
-	assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
+	assert(inum != IRQ_PIC0_SPUR);
+	assert(inum != IRQ_PIC1_SPUR);
+	assert(inum != IRQ_PIC1);
 
 	irq_t *irq = irq_dispatch_and_lock(inum);
@@ -220,4 +222,15 @@
 }
 
+static void pic_spurious(unsigned int n, istate_t *istate)
+{
+	/*
+	 * XXX: Examine ISR to figure out whether this is indeed a spurious
+	 *      or actual IRQ.
+	 */
+#ifdef CONFIG_DEBUG
+	log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
+#endif
+}
+
 void interrupt_init(void)
 {
@@ -228,5 +241,6 @@
 
 	for (i = 0; i < IRQ_COUNT; i++) {
-		if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
+		if ((i != IRQ_PIC0_SPUR) && (i != IRQ_PIC1_SPUR) &&
+		    (i != IRQ_PIC1))
 			exc_register(IVT_IRQBASE + i, "irq", true,
 			    (iroutine_t) irq_interrupt);
@@ -239,4 +253,8 @@
 	exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
 	exc_register(VECTOR_XM, "simd_fp", true, (iroutine_t) simd_fp_exception);
+	exc_register(VECTOR_PIC0_SPUR, "pic0_spurious", true,
+	    (iroutine_t) pic_spurious);
+	exc_register(VECTOR_PIC1_SPUR, "pic1_spurious", true,
+	    (iroutine_t) pic_spurious);
 
 #ifdef CONFIG_SMP
Index: kernel/arch/mips32/include/arch/mach/malta/malta.h
===================================================================
--- kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -45,5 +45,7 @@
 
 #define PIC0_BASE		(MALTA_PCI_BASE + 0x20)
+#define PIC0_SPURIOUS_IRQ	7
 #define PIC1_BASE		(MALTA_PCI_BASE + 0xa0)
+#define PIC1_SPURIOUS_IRQ	15
 
 #define ISA_IRQ_COUNT		16
Index: kernel/arch/mips32/src/mach/malta/malta.c
===================================================================
--- kernel/arch/mips32/src/mach/malta/malta.c	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/mips32/src/mach/malta/malta.c	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -74,4 +74,15 @@
 {
 	uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
+	if (isa_irq == PIC0_SPURIOUS_IRQ || isa_irq == PIC1_SPURIOUS_IRQ) {
+		/*
+		 * XXX: Examine ISR to figure out whether this is indeed a
+		 *      spurious or actual IRQ.
+		 */
+#ifdef CONFIG_DEBUG
+		log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt",
+		    CPU->id);
+		return;
+#endif
+	}
 	irq_t *irq = irq_dispatch_and_lock(isa_irq);
 	if (irq) {
Index: kernel/genarch/src/drivers/i8259/i8259.c
===================================================================
--- kernel/genarch/src/drivers/i8259/i8259.c	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/genarch/src/drivers/i8259/i8259.c	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -43,6 +43,4 @@
 #include <interrupt.h>
 
-static void pic_spurious(unsigned int n, istate_t *istate);
-
 // XXX: need to change pic_* API to get rid of these
 static i8259_t *saved_pic0;
@@ -78,14 +76,4 @@
 	/* ICW4: i8086 mode */
 	pio_write_8(&pic1->port2, 1);
-
-	/*
-	 * Register interrupt handler for the PIC spurious interrupt.
-	 *
-	 * XXX: This is currently broken. Both IRQ 7 and IRQ 15 can be spurious
-	 *      or can be actual interrupts. This needs to be detected when
-	 *      the interrupt happens by inspecting ISR.
-	 */
-	exc_register(irq0_int + 7, "pic_spurious", false,
-	    (iroutine_t) pic_spurious);
 
 	pic_disable_irqs(0xffff);		/* disable all irq's */
@@ -130,11 +118,4 @@
 }
 
-void pic_spurious(unsigned int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
-{
-#ifdef CONFIG_DEBUG
-	log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt", CPU->id);
-#endif
-}
-
 /** @}
  */