Index: kernel/arch/mips32/include/arch/mach/malta/malta.h
===================================================================
--- kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -45,5 +45,7 @@
 
 #define PIC0_BASE		(MALTA_PCI_BASE + 0x20)
+#define PIC0_SPURIOUS_IRQ	7
 #define PIC1_BASE		(MALTA_PCI_BASE + 0xa0)
+#define PIC1_SPURIOUS_IRQ	15
 
 #define ISA_IRQ_COUNT		16
Index: kernel/arch/mips32/src/mach/malta/malta.c
===================================================================
--- kernel/arch/mips32/src/mach/malta/malta.c	(revision f4bb4047b53734624733678b3dcb9936d92ea37a)
+++ kernel/arch/mips32/src/mach/malta/malta.c	(revision f6cf76f7843c1167e30be1aca613561ef0b4f295)
@@ -74,4 +74,15 @@
 {
 	uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
+	if (isa_irq == PIC0_SPURIOUS_IRQ || isa_irq == PIC1_SPURIOUS_IRQ) {
+		/*
+		 * XXX: Examine ISR to figure out whether this is indeed a
+		 *      spurious or actual IRQ.
+		 */
+#ifdef CONFIG_DEBUG
+		log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt",
+		    CPU->id);
+		return;
+#endif
+	}
 	irq_t *irq = irq_dispatch_and_lock(isa_irq);
 	if (irq) {