Index: kernel/arch/ia64/src/fpu_context.c
===================================================================
--- kernel/arch/ia64/src/fpu_context.c	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
+++ kernel/arch/ia64/src/fpu_context.c	(revision f67d8ee72bcaaf0db7d633578c4b36ddff968098)
@@ -462,6 +462,4 @@
 void fpu_enable(void)
 {
-	uint64_t a = 0;
-
 	asm volatile (
 	    "rsm %0 ;;"
@@ -471,18 +469,8 @@
 	    : "i" (PSR_DFH_MASK)
 	);
-
-	asm volatile (
-	    "mov %0 = ar.fpsr ;;\n"
-	    "or %0 = %0,%1 ;;\n"
-	    "mov ar.fpsr = %0 ;;\n"
-	    : "+r" (a)
-	    : "r" (0x38)
-	);
 }
 
 void fpu_disable(void)
 {
-	uint64_t a = 0;
-
 	asm volatile (
 	    "ssm %0 ;;\n"
@@ -492,4 +480,9 @@
 	    : "i" (PSR_DFH_MASK)
 	);
+}
+
+void fpu_init(void)
+{
+	uint64_t a = 0;
 
 	asm volatile (
@@ -498,18 +491,5 @@
 	    "mov ar.fpsr = %0 ;;\n"
 	    : "+r" (a)
-	    : "r" (0x38)
-	);
-}
-
-void fpu_init(void)
-{
-	uint64_t a = 0;
-
-	asm volatile (
-	    "mov %0 = ar.fpsr ;;\n"
-	    "or %0 = %0,%1 ;;\n"
-	    "mov ar.fpsr = %0 ;;\n"
-	    : "+r" (a)
-	    : "r" (0x38)
+	    : "r" (FPSR_TRAPS_ALL)
 	);