Index: uspace/drv/audio/sb16/dma_controller.c
===================================================================
--- uspace/drv/audio/sb16/dma_controller.c	(revision 4440581db3292ab8fb5c1d4e265dd4fad9bd4fc5)
+++ uspace/drv/audio/sb16/dma_controller.c	(revision f6062f153615791aa676909813abbcaab9003533)
@@ -85,7 +85,8 @@
 
 	uint8_t flip_flop;
+	/* Master reset sets Flip-Flop low, clears status,
+	 * sets all mask bits on */
 	uint8_t master_reset; /* Intermediate is not implemented on PCs */
 	uint8_t mask_reset;
-/* Master reset sets Flip-Flop low, clears status,sets all mask bits on */
 
 	uint8_t multi_mask;
@@ -123,5 +124,5 @@
 	uint8_t flip_flop;
 	uint8_t reservedc;
-	uint8_t master_reset_intermediate;
+	uint8_t master_reset;
 	uint8_t reservedd;
 	uint8_t multi_mask;
@@ -214,4 +215,9 @@
 		return EIO;
 	controller->initialized = true;
+
+	pio_write_8(&controller->second->master_reset, 0xff);
+	pio_write_8(&controller->first->master_reset, 0xff);
+
+
 	return EOK;
 }
@@ -232,5 +238,5 @@
 
 	/* 16 bit transfers are a bit special */
-	ddf_log_debug("Unspoiled address and size: %p(%zu).\n", pa, size);
+	ddf_log_debug("Unspoiled address: %p and size: %zu.\n", pa, size);
 	if (channel > 4) {
 		/* Size is the count of 16bit words */
@@ -253,4 +259,6 @@
 	/* Set mode */
 	value = DMA_MODE_CHAN_TO_REG(channel) | mode;
+	ddf_log_verbose("Writing mode byte: %p:%hhx.\n",
+	    dma_channel.mode_address, value);
 	pio_write_8(dma_channel.mode_address, value);
 
@@ -260,16 +268,19 @@
 	/* Low byte */
 	value = pa & 0xff;
-	ddf_log_verbose("Writing address low byte: %hhx.\n", value);
+	ddf_log_verbose("Writing address low byte: %p:%hhx.\n",
+	    dma_channel.offset_reg_address, value);
 	pio_write_8(dma_channel.offset_reg_address, value);
 
 	/* High byte */
 	value = (pa >> 8) & 0xff;
-	ddf_log_verbose("Writing address high byte: %hhx.\n", value);
+	ddf_log_verbose("Writing address high byte: %p:%hhx.\n",
+	    dma_channel.offset_reg_address, value);
 	pio_write_8(dma_channel.offset_reg_address, value);
 
 	/* Page address - third byte */
 	value = (pa >> 16) & 0xff;
-	ddf_log_verbose("Writing address page byte: %hhx.\n", value);
-	pio_write_8(dma_channel.offset_reg_address, value);
+	ddf_log_verbose("Writing address page byte: %p:%hhx.\n",
+	    dma_channel.page_reg_address, value);
+	pio_write_8(dma_channel.page_reg_address, value);
 
 	/* Set size -- reset flip-flop */
@@ -278,11 +289,13 @@
 	/* Low byte */
 	value = (size - 1) & 0xff;
-	ddf_log_verbose("Writing size low byte: %hhx.\n", value);
-	pio_write_8(dma_channel.offset_reg_address, value);
+	ddf_log_verbose("Writing size low byte: %p:%hhx.\n",
+	    dma_channel.size_reg_address, value);
+	pio_write_8(dma_channel.size_reg_address, value);
 
 	/* High byte */
 	value = ((size - 1) >> 8) & 0xff;
-	ddf_log_verbose("Writing size high byte: %hhx.\n", value);
-	pio_write_8(dma_channel.offset_reg_address, value);
+	ddf_log_verbose("Writing size high byte: %p:%hhx.\n",
+	    dma_channel.size_reg_address, value);
+	pio_write_8(dma_channel.size_reg_address, value);
 
 	/* Unmask DMA request */
