Changeset f238e86 in mainline


Ignore:
Timestamp:
2009-10-18T17:27:09Z (15 years ago)
Author:
Pavel Rimsky <pavel@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
66e08d02
Parents:
68834d85
Message:

Both sun4u and sun4v are compilable, sun4u feature-complete, sun4v reaches (at least) version_print.

Files:
22 added
1 deleted
7 edited
3 moved

Legend:

Unmodified
Added
Removed

  • boot/arch/sparc64/loader/asm.S

    r68834d85 rf238e86  
    115115         */
    116116       
     117#if defined (SUN4U)
    117118        /*
    118119         * US3 processors have a write-invalidate cache, so explicitly
    … …  
    128129                call icache_flush
    129130                nop
    130        
     131#endif 
    131132        1:
    132133                membar #StoreStore

  • boot/arch/sparc64/loader/main.c

    r68834d85 rf238e86  
    5757#endif
    5858
    59 /** UltraSPARC subarchitecture - 1 for US, 3 for US3 */
    60 static uint8_t subarchitecture;
     59/** UltraSPARC subarchitecture - 1 for US, 3 for US3, 0 for other */
     60static uint8_t subarchitecture = 0;
    6161
    6262/**
    … …  
    6969static void version_print(void)
    7070{
     71       
    7172        printf("HelenOS SPARC64 Bootloader\nRelease %s%s%s\n"
    7273            "Copyright (c) 2006 HelenOS project\n",
    … …  
    8384#define US_IIIi_CODE   0x15
    8485
    85 /**
    86  * Sets the global variables "subarchitecture" and "mid_mask" to
     86/* max. length of the "compatible" property of the root node */
     87#define COMPATIBLE_PROP_MAXLEN  64
     88
     89/*
     90 * HelenOS bootloader will use these constants to distinguish particular
     91 * UltraSPARC architectures
     92 */
     93#define COMPATIBLE_SUN4U        10
     94#define COMPATIBLE_SUN4V        20
     95
     96/** US architecture. COMPATIBLE_SUN4U for sun4v, COMPATIBLE_SUN4V for sun4u */
     97static uint8_t architecture;
     98
     99/**
     100 * Detects the UltraSPARC architecture (sun4u and sun4v currently supported)
     101 * by inspecting the property called "compatible" in the OBP root node.
     102 */
     103static void detect_architecture(void)
     104{
     105        phandle root = ofw_find_device("/");
     106        char compatible[COMPATIBLE_PROP_MAXLEN];
     107
     108        if (ofw_get_property(root, "compatible", compatible,
     109                        COMPATIBLE_PROP_MAXLEN) <= 0) {
     110                printf("Unable to determine architecture, default: sun4u.\n");
     111                architecture = COMPATIBLE_SUN4U;
     112                return;
     113        }
     114
     115        if (strcmp(compatible, "sun4v") == 0) {
     116                architecture = COMPATIBLE_SUN4V;
     117        } else {
     118                /*
     119                 * As not all sun4u machines have "sun4u" in their "compatible"
     120                 * OBP property (e.g. Serengeti's OBP "compatible" property is
     121                 * "SUNW,Serengeti"), we will by default fallback to sun4u if
     122                 * an unknown value of the "compatible" property is encountered.
     123                 */
     124                architecture = COMPATIBLE_SUN4U;
     125        }
     126}
     127
     128
     129/**
     130 * Detects the subarchitecture (US, US3) of the sun4u
     131 * processor. Sets the global variables "subarchitecture" and "mid_mask" to
    87132 * correct values.
    88133 */
    … …  
    109154}
    110155
     156/**
     157 * Performs sun4u-specific initialization. The components are expected
     158 * to be already copied and boot allocator initialized.
     159 *
     160 * @param base  kernel base virtual address
     161 * @param top   virtual address above which the boot allocator
     162 *              can make allocations
     163 */
     164static void bootstrap_sun4u(void *base, unsigned int top)
     165{
     166        void *balloc_base;
     167        /*
     168         * Claim and map the physical memory for the boot allocator.
     169         * Initialize the boot allocator.
     170         */
     171        balloc_base = base + ALIGN_UP(top, PAGE_SIZE);
     172        (void) ofw_claim_phys(bootinfo.physmem_start + balloc_base,
     173            BALLOC_MAX_SIZE);
     174        (void) ofw_map(bootinfo.physmem_start + balloc_base, balloc_base,
     175            BALLOC_MAX_SIZE, -1);
     176        balloc_init(&bootinfo.ballocs, (uintptr_t) balloc_base,
     177            (uintptr_t) balloc_base);
     178       
     179        printf("Setting up screens...");
     180        ofw_setup_screens();
     181        printf("done.\n");
     182       
     183        printf("Canonizing OpenFirmware device tree...");
     184        bootinfo.ofw_root = ofw_tree_build();
     185        printf("done.\n");
     186       
     187#ifdef CONFIG_AP
     188        printf("Checking for secondary processors...");
     189        if (!ofw_cpu(mid_mask, bootinfo.physmem_start))
     190                printf("Error: unable to get CPU properties\n");
     191        printf("done.\n");
     192#endif
     193
     194}
     195
     196/**
     197 *  * Performs sun4v-specific initialization. The components are expected
     198 *   * to be already copied and boot allocator initialized.
     199 *    */
     200static void bootstrap_sun4v(void)
     201{
     202        /*
     203         * When SILO booted, the OBP had established a virtual to physical
     204         * memory mapping. This mapping is not an identity (because the
     205         * physical memory starts on non-zero address) - this is not
     206         * surprising. But! The mapping even does not map virtual address
     207         * 0 onto the starting address of the physical memory, but onto an
     208         * address which is 0x400000 bytes higher. The reason is that the
     209         * OBP had already used the memory just at the beginning of the
     210         * physical memory, so that memory cannot be used by SILO (nor
     211         * bootloader). As for now, we solve it by a nasty workaround:
     212         * we pretend that the physical memory starts 0x400000 bytes further
     213         * than it actually does (and hence pretend that the physical memory
     214         * is 0x400000 bytes smaller). Of course, the value 0x400000 will most
     215         * probably depend on the machine and OBP version (the workaround now
     216         * works on Simics). A solution would be to inspect the "available"
     217         * property of the "/memory" node to find out which parts of memory
     218         * are used by OBP and redesign the algorithm of copying
     219         * kernel/init tasks/ramdisk from the bootable image to memory
     220         * (which we must do anyway because of issues with claiming the memory
     221         * on Serengeti).
     222         */
     223        bootinfo.physmem_start += 0x400000;
     224        bootinfo.memmap.zones[0].start += 0x400000;
     225        bootinfo.memmap.zones[0].size -= 0x400000;
     226        printf("The sun4v init finished.");
     227}
     228
     229
    111230void bootstrap(void)
    112231{
    113232        void *base = (void *) KERNEL_VIRTUAL_ADDRESS;
    114         void *balloc_base;
    115233        unsigned int top = 0;
    116234        unsigned int i;
    117235        unsigned int j;
    118236       
    119         version_print();
    120        
    121         detect_subarchitecture();
     237        detect_architecture();
    122238        init_components(components);
    123239       
    … …  
    260376        printf("done.\n");
    261377       
    262         /*
    263          * Claim and map the physical memory for the boot allocator.
    264          * Initialize the boot allocator.
    265          */
    266         balloc_base = base + ALIGN_UP(top, PAGE_SIZE);
    267         (void) ofw_claim_phys(bootinfo.physmem_start + balloc_base,
    268             BALLOC_MAX_SIZE);
    269         (void) ofw_map(bootinfo.physmem_start + balloc_base, balloc_base,
    270             BALLOC_MAX_SIZE, -1);
    271         balloc_init(&bootinfo.ballocs, (uintptr_t) balloc_base,
    272             (uintptr_t) balloc_base);
    273        
    274         printf("Setting up screens...");
    275         ofw_setup_screens();
    276         printf("done.\n");
    277        
    278         printf("Canonizing OpenFirmware device tree...");
    279         bootinfo.ofw_root = ofw_tree_build();
    280         printf("done.\n");
    281        
    282 #ifdef CONFIG_AP
    283         printf("Checking for secondary processors...");
    284         if (!ofw_cpu(mid_mask, bootinfo.physmem_start))
    285                 printf("Error: unable to get CPU properties\n");
    286         printf("done.\n");
    287 #endif
     378        /* perform architecture-specific initialization */
     379        if (architecture == COMPATIBLE_SUN4U) {
     380                bootstrap_sun4u(base, top);
     381        } else if (architecture == COMPATIBLE_SUN4V) {
     382                bootstrap_sun4v();
     383        } else {
     384                printf("Unknown architecture.\n");
     385                halt();
     386        }
    288387       
    289388        printf("Booting the kernel...\n");

  • defaults/sparc64/sun4v/Makefile.config

    r68834d85 rf238e86  
    44# CPU type
    55PROCESSOR = sun4v
     6
     7CONFIG_RD_EXTERNAL = n

  • kernel/arch/sparc64/Makefile.inc

    r68834d85 rf238e86  
    4646ifeq ($(PROCESSOR),us)
    4747        DEFS += -DUS
     48        DEFS += -DSUN4U
     49        USARCH = sun4u
    4850endif
    4951
    5052ifeq ($(PROCESSOR),us3)
    5153        DEFS += -DUS3
     54        DEFS += -DSUN4U
     55        USARCH = sun4u
    5256endif
    5357
    5458ifeq ($(PROCESSOR),sun4v)
    5559        DEFS += -DSUN4V
     60        USARCH = sun4v
    5661#MH
    5762        DEFS += -DUS
    … …  
    6873        arch/$(KARCH)/src/mm/as.c \
    6974        arch/$(KARCH)/src/mm/cache.S \
    70         arch/$(KARCH)/src/mm/frame.c \
     75        arch/$(KARCH)/src/mm/$(USARCH)/frame.c \
    7176        arch/$(KARCH)/src/mm/page.c \
    72         arch/$(KARCH)/src/mm/tlb.c \
    73         arch/$(KARCH)/src/sparc64.c \
    74         arch/$(KARCH)/src/start.S \
     77        arch/$(KARCH)/src/mm/$(USARCH)/tlb.c \
     78        arch/$(KARCH)/src/$(USARCH)/sparc64.c \
     79        arch/$(KARCH)/src/$(USARCH)/start.S \
    7580        arch/$(KARCH)/src/proc/scheduler.c \
    7681        arch/$(KARCH)/src/proc/thread.c \

  • kernel/arch/sparc64/include/mm/frame.h

    r68834d85 rf238e86  
    3636#define KERN_sparc64_FRAME_H_
    3737
    38 /*
    39  * Page size supported by the MMU.
    40  * For 8K there is the nasty illegal virtual aliasing problem.
    41  * Therefore, the kernel uses 8K only internally on the TLB and TSB levels.
    42  */
    43 #define MMU_FRAME_WIDTH         13      /* 8K */
    44 #define MMU_FRAME_SIZE          (1 << MMU_FRAME_WIDTH)
    45 
    46 /*
    47  * Page size exported to the generic memory management subsystems.
    48  * This page size is not directly supported by the MMU, but we can emulate
    49  * each 16K page with a pair of adjacent 8K pages.
    50  */
    51 #define FRAME_WIDTH             14      /* 16K */
    52 #define FRAME_SIZE              (1 << FRAME_WIDTH)
    53 
    54 #ifdef KERNEL
    55 #ifndef __ASM__
    56 
    57 #include <arch/types.h>
    58 
    59 union frame_address {
    60         uintptr_t address;
    61         struct {
    62 #if defined (US)
    63                 unsigned : 23;
    64                 uint64_t pfn : 28;              /**< Physical Frame Number. */
    65 #elif defined (US3)
    66                 unsigned : 21;
    67                 uint64_t pfn : 30;              /**< Physical Frame Number. */
    68 #endif
    69                 unsigned offset : 13;           /**< Offset. */
    70         } __attribute__ ((packed));
    71 };
    72 
    73 typedef union frame_address frame_address_t;
    74 
    75 extern uintptr_t last_frame;
    76 extern uintptr_t end_of_identity;
    77 
    78 extern void frame_arch_init(void);
    79 #define physmem_print()
    80 
    81 #endif
     38#if defined (SUN4U)
     39#include <arch/mm/sun4u/frame.h>
     40#elif defined (SUN4V)
     41#include <arch/mm/sun4v/frame.h>
    8242#endif
    8343

  • kernel/arch/sparc64/include/trap/mmu.h

    r68834d85 rf238e86  
    3838#define KERN_sparc64_MMU_TRAP_H_
    3939
    40 #include <arch/stack.h>
    41 #include <arch/regdef.h>
    42 #include <arch/mm/tlb.h>
    43 #include <arch/mm/mmu.h>
    44 #include <arch/mm/tte.h>
    45 #include <arch/trap/regwin.h>
    46 
    47 #ifdef CONFIG_TSB
    48 #include <arch/mm/tsb.h>
     40#if defined (SUN4U)
     41#include <arch/trap/sun4u/mmu.h>
     42#elif defined (SUN4V)
     43#include <arch/trap/sun4v/mmu.h>
    4944#endif
    50 
    51 #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS     0x64
    52 #define TT_FAST_DATA_ACCESS_MMU_MISS            0x68
    53 #define TT_FAST_DATA_ACCESS_PROTECTION          0x6c
    54 
    55 #define FAST_MMU_HANDLER_SIZE                   128
    56 
    57 #ifdef __ASM__
    58 
    59 .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
    60         /*
    61          * First, try to refill TLB from TSB.
    62          */
    63 #ifdef CONFIG_TSB
    64         ldxa [%g0] ASI_IMMU, %g1                        ! read TSB Tag Target Register
    65         ldxa [%g0] ASI_IMMU_TSB_8KB_PTR_REG, %g2        ! read TSB 8K Pointer
    66         ldda [%g2] ASI_NUCLEUS_QUAD_LDD, %g4            ! 16-byte atomic load into %g4 and %g5
    67         cmp %g1, %g4                                    ! is this the entry we are looking for?
    68         bne,pn %xcc, 0f
    69         nop
    70         stxa %g5, [%g0] ASI_ITLB_DATA_IN_REG            ! copy mapping from ITSB to ITLB
    71         retry
    72 #endif
    73 
    74 0:
    75         wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
    76         PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
    77 .endm
    78 
    79 .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
    80         /*
    81          * First, try to refill TLB from TSB.
    82          */
    83 
    84 #ifdef CONFIG_TSB
    85         ldxa [%g0] ASI_DMMU, %g1                        ! read TSB Tag Target Register
    86         srlx %g1, TSB_TAG_TARGET_CONTEXT_SHIFT, %g2     ! is this a kernel miss?
    87         brz,pn %g2, 0f
    88         ldxa [%g0] ASI_DMMU_TSB_8KB_PTR_REG, %g3        ! read TSB 8K Pointer
    89         ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4            ! 16-byte atomic load into %g4 and %g5
    90         cmp %g1, %g4                                    ! is this the entry we are looking for?
    91         bne,pn %xcc, 0f
    92         nop
    93         stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG            ! copy mapping from DTSB to DTLB
    94         retry
    95 #endif
    96 
    97         /*
    98          * Second, test if it is the portion of the kernel address space
    99          * which is faulting. If that is the case, immediately create
    100          * identity mapping for that page in DTLB. VPN 0 is excluded from
    101          * this treatment.
    102          *
    103          * Note that branch-delay slots are used in order to save space.
    104          */
    105 0:
    106         sethi %hi(fast_data_access_mmu_miss_data_hi), %g7
    107         wr %g0, ASI_DMMU, %asi
    108         ldxa [VA_DMMU_TAG_ACCESS] %asi, %g1             ! read the faulting Context and VPN
    109         set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
    110         andcc %g1, %g2, %g3                             ! get Context
    111         bnz %xcc, 0f                                    ! Context is non-zero
    112         andncc %g1, %g2, %g3                            ! get page address into %g3
    113         bz  %xcc, 0f                                    ! page address is zero
    114         ldx [%g7 + %lo(end_of_identity)], %g4
    115         cmp %g3, %g4
    116         bgeu %xcc, 0f
    117 
    118         ldx [%g7 + %lo(kernel_8k_tlb_data_template)], %g2
    119         add %g3, %g2, %g2
    120         stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG            ! identity map the kernel page
    121         retry
    122 
    123         /*
    124          * Third, catch and handle special cases when the trap is caused by
    125          * the userspace register window spill or fill handler. In case
    126          * one of these two traps caused this trap, we just lower the trap
    127          * level and service the DTLB miss. In the end, we restart
    128          * the offending SAVE or RESTORE.
    129          */
    130 0:
    131 .if (\tl > 0)
    132         wrpr %g0, 1, %tl
    133 .endif
    134 
    135         /*
    136          * Switch from the MM globals.
    137          */
    138         wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
    139 
    140         /*
    141          * Read the Tag Access register for the higher-level handler.
    142          * This is necessary to survive nested DTLB misses.
    143          */     
    144         ldxa [VA_DMMU_TAG_ACCESS] %asi, %g2
    145 
    146         /*
    147          * g2 will be passed as an argument to fast_data_access_mmu_miss().
    148          */
    149         PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
    150 .endm
    151 
    152 .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
    153         /*
    154          * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
    155          */
    156 
    157 .if (\tl > 0)
    158         wrpr %g0, 1, %tl
    159 .endif
    160 
    161         /*
    162          * Switch from the MM globals.
    163          */
    164         wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
    165 
    166         /*
    167          * Read the Tag Access register for the higher-level handler.
    168          * This is necessary to survive nested DTLB misses.
    169          */     
    170         mov VA_DMMU_TAG_ACCESS, %g2
    171         ldxa [%g2] ASI_DMMU, %g2
    172 
    173         /*
    174          * g2 will be passed as an argument to fast_data_access_mmu_miss().
    175          */
    176         PREEMPTIBLE_HANDLER fast_data_access_protection
    177 .endm
    178 
    179 #endif /* __ASM__ */
    18045
    18146#endif

  • kernel/generic/src/main/version.c

    r68834d85 rf238e86  
    5858void version_print(void)
    5959{
     60        asm volatile ("sethi 0x41923, %g0");
    6061        printf("%s, release %s (%s)%s\nBuilt%s for %s\n%s\n",
    6162                project, release, name, revision, timestamp, arch, copyright);
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