Changeset f14291b in mainline for kernel

Timestamp:

2010-10-19T20:55:53Z (16 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export

Children:

a93d79a

Parents:

1882525 (diff), a7a85d16 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

Location:

kernel

Files:

• Makefile (modified) (2 diffs)
• arch/amd64/_link.ld.in (modified) (1 diff)
• arch/amd64/include/pm.h (modified) (2 diffs)
• arch/amd64/src/asm.S (modified) (1 diff)
• arch/amd64/src/boot/boot.S (modified) (4 diffs)
• arch/amd64/src/boot/vesa_ret.inc (modified) (2 diffs)
• arch/amd64/src/ddi/ddi.c (modified) (1 diff)
• arch/amd64/src/pm.c (modified) (2 diffs)
• arch/amd64/src/smp/ap.S (modified) (2 diffs)
• arch/amd64/src/syscall.c (modified) (1 diff)
• arch/amd64/src/userspace.c (modified) (1 diff)
• arch/arm32/include/mach/integratorcp/integratorcp.h (modified) (1 diff)
• arch/arm32/include/mach/testarm/testarm.h (modified) (1 diff)
• arch/arm32/include/machine_func.h (modified) (1 diff)
• arch/arm32/src/mach/gta02/gta02.c (modified) (8 diffs)
• arch/arm32/src/mach/integratorcp/integratorcp.c (modified) (2 diffs)
• arch/arm32/src/mach/testarm/testarm.c (modified) (2 diffs)
• arch/arm32/src/machine_func.c (modified) (1 diff)
• arch/ia32/include/bios/bios.h (modified) (1 diff)
• arch/ia32/include/mm/as.h (modified) (1 diff)
• arch/ia32/include/mm/page.h (modified) (2 diffs)
• arch/ia32/include/pm.h (modified) (2 diffs)
• arch/ia32/src/asm.S (modified) (4 diffs)
• arch/ia32/src/bios/bios.c (modified) (1 diff)
• arch/ia32/src/boot/boot.S (modified) (3 diffs)
• arch/ia32/src/boot/vesa_real.inc (modified) (2 diffs)
• arch/ia32/src/boot/vesa_ret.inc (modified) (2 diffs)
• arch/ia32/src/ddi/ddi.c (modified) (1 diff)
• arch/ia32/src/mm/frame.c (modified) (3 diffs)
• arch/ia32/src/pm.c (modified) (4 diffs)
• arch/ia32/src/proc/scheduler.c (modified) (1 diff)
• arch/ia32/src/syscall.c (modified) (1 diff)
• arch/ia32/src/userspace.c (modified) (1 diff)
• arch/mips32/include/context_offset.h (modified) (1 diff)
• arch/mips32/include/exception.h (modified) (4 diffs)
• arch/mips32/include/smp/dorder.h (moved) (moved from uspace/lib/net/include/netif_nil_bundle.h ) (2 diffs)
• arch/mips32/src/debug/stacktrace.c (modified) (5 diffs)
• arch/mips32/src/exception.c (modified) (2 diffs)
• arch/mips32/src/interrupt.c (modified) (4 diffs)
• arch/mips32/src/smp/dorder.c (modified) (1 diff)
• arch/mips32/src/start.S (modified) (13 diffs)
• genarch/Makefile.inc (modified) (1 diff)
• genarch/include/drivers/s3c24xx_irqc/s3c24xx_irqc.h (modified) (2 diffs)
• genarch/include/drivers/s3c24xx_uart/s3c24xx_uart.h (modified) (1 diff)
• genarch/src/drivers/s3c24xx_irqc/s3c24xx_irqc.c (added)
• genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c (modified) (7 diffs)
• generic/include/ddi/ddi.h (modified) (1 diff)
• generic/include/security/cap.h (modified) (1 diff)
• generic/include/syscall/syscall.h (modified) (1 diff)
• generic/src/ddi/ddi.c (modified) (1 diff)
• generic/src/main/kinit.c (modified) (1 diff)
• generic/src/mm/frame.c (modified) (2 diffs)
• generic/src/syscall/syscall.c (modified) (1 diff)

kernel/Makefile

@@ -120 +120 @@
 ifeq ($(CONFIG_LTO),y)
         GCC_CFLAGS += -flto
+endif
+
+ifeq ($(CONFIG_LINE_DEBUG),y)
+        GCC_CFLAGS += -g
+        ICC_CFLAGS += -g
+        SUNCC_CFLAGS += -g
+        CLANG_CFLAGS += -g
 endif
 
@@ -401 +408 @@
 
 $(DISASM): $(RAW)
+ifeq ($(CONFIG_LINE_DEBUG),y)
+        $(OBJDUMP) -d -S $< > $@
+else
         $(OBJDUMP) -d $< > $@
+endif
 
 $(RAW): $(LINK) $(ARCH_OBJECTS) $(GENARCH_OBJECTS) $(GENERIC_OBJECTS) $(SYMTAB_OBJECTS)

kernel/arch/amd64/_link.ld.in

@@ -53 +53 @@
         }
         
+#ifdef CONFIG_LINE_DEBUG
+        .comment 0 : { *(.comment); }
+        .debug_abbrev 0 : { *(.debug_abbrev); }
+        .debug_aranges 0 : { *(.debug_aranges); }
+        .debug_info 0 : { *(.debug_info); }
+        .debug_line 0 : { *(.debug_line); }
+        .debug_loc 0 : { *(.debug_loc); }
+        .debug_pubnames 0 : { *(.debug_pubnames); }
+        .debug_pubtypes 0 : { *(.debug_pubtypes); }
+        .debug_ranges 0 : { *(.debug_ranges); }
+        .debug_str 0 : { *(.debug_str); }
+#endif
+        
         /DISCARD/ : {
                 *(*);

kernel/arch/amd64/include/pm.h

@@ -65 +65 @@
 #endif /* CONFIG_FB */
 
-#define gdtselector(des)  ((des) << 3)
-#define idtselector(des)  ((des) << 4)
+#define GDT_SELECTOR(des)  ((des) << 3)
 
 #define PL_KERNEL  0
@@ -168 +167 @@
 
 extern ptr_16_64_t gdtr;
-extern ptr_16_32_t bootstrap_gdtr;
 extern ptr_16_32_t protected_ap_gdtr;
 

kernel/arch/amd64/src/asm.S

@@ -244 +244 @@
          */
         xorq %rdx, %rdx
-        cmpq $(gdtselector(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
+        cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
         cmovnzq %rdx, %rbp
 

kernel/arch/amd64/src/boot/boot.S

@@ -85 +85 @@
         
         /* Kernel data + stack */
-        movw $gdtselector(KDATA_DES), %cx
+        movw $GDT_SELECTOR(KDATA_DES), %cx
         movw %cx, %es
         movw %cx, %ds
@@ -94 +94 @@
          * when _visible_ part of GS does not point to user-mode segment.
          */
-        movw $gdtselector(UDATA_DES), %cx
+        movw $GDT_SELECTOR(UDATA_DES), %cx
         movw %cx, %fs
         movw %cx, %gs
         
-        jmpl $gdtselector(KTEXT32_DES), $multiboot_meeting_point
+        jmpl $GDT_SELECTOR(KTEXT32_DES), $multiboot_meeting_point
         multiboot_meeting_point:
         
@@ -182 +182 @@
         
         /* At this point we are in compatibility mode */
-        jmpl $gdtselector(KTEXT_DES), $start64
+        jmpl $GDT_SELECTOR(KTEXT_DES), $start64
 
 /** Print string to EGA display (in light red) and halt.
@@ -645 +645 @@
 .section K_DATA_START, "aw", @progbits
 
-.global bootstrap_gdtr
 bootstrap_gdtr:
-        .word gdtselector(GDT_ITEMS)
+        .word GDT_SELECTOR(GDT_ITEMS)
         .long KA2PA(gdt)
 

kernel/arch/amd64/src/boot/vesa_ret.inc

@@ -7 +7 @@
         
         /* Kernel data + stack */
-        movw $gdtselector(KDATA_DES), %cx
+        movw $GDT_SELECTOR(KDATA_DES), %cx
         movw %cx, %es
         movw %cx, %ds
@@ -17 +17 @@
          */
         
-        movw $gdtselector(UDATA_DES), %cx
+        movw $GDT_SELECTOR(UDATA_DES), %cx
         movw %cx, %fs
         movw %cx, %gs
         
-        jmpl $gdtselector(KTEXT32_DES), $vesa_meeting_point
+        jmpl $GDT_SELECTOR(KTEXT32_DES), $vesa_meeting_point

kernel/arch/amd64/src/ddi/ddi.c

@@ -153 +153 @@
         tss_descriptor_t *tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
         tss_desc->type = AR_TSS;
-        tr_load(gdtselector(TSS_DES));
+        tr_load(GDT_SELECTOR(TSS_DES));
         
         /*

kernel/arch/amd64/src/pm.c

@@ -171 +171 @@
 
                 d->unused = 0;
-                d->selector = gdtselector(KTEXT_DES);
+                d->selector = GDT_SELECTOR(KTEXT_DES);
 
                 d->present = 1;
@@ -291 +291 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(gdtselector(TSS_DES));
+        tr_load(GDT_SELECTOR(TSS_DES));
 }
 

kernel/arch/amd64/src/smp/ap.S

@@ -61 +61 @@
         orl $1, %eax
         movl %eax, %cr0     # switch to protected mode
-        jmpl $gdtselector(KTEXT32_DES), $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
+        jmpl $GDT_SELECTOR(KTEXT32_DES), $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
 
 jump_to_kernel:
 .code32
-        movw $gdtselector(KDATA_DES), %ax
+        movw $GDT_SELECTOR(KDATA_DES), %ax
         movw %ax, %ds
         movw %ax, %es
         movw %ax, %ss
-        movw $gdtselector(UDATA_DES), %ax
+        movw $GDT_SELECTOR(UDATA_DES), %ax
         movw %ax, %gs
         
@@ -94 +94 @@
         
         # At this point we are in compatibility mode
-        jmpl $gdtselector(KTEXT_DES), $start64 - BOOT_OFFSET + AP_BOOT_OFFSET
+        jmpl $GDT_SELECTOR(KTEXT_DES), $start64 - BOOT_OFFSET + AP_BOOT_OFFSET
 
 .code64

kernel/arch/amd64/src/syscall.c

@@ -58 +58 @@
          */
         write_msr(AMD_MSR_STAR,
-            ((uint64_t)(gdtselector(KDATA_DES) | PL_USER) << 48) |
-            ((uint64_t)(gdtselector(KTEXT_DES) | PL_KERNEL) << 32));
+            ((uint64_t) (GDT_SELECTOR(KDATA_DES) | PL_USER) << 48) |
+            ((uint64_t) (GDT_SELECTOR(KTEXT_DES) | PL_KERNEL) << 32));
         write_msr(AMD_MSR_LSTAR, (uint64_t)syscall_entry);
         /* Mask RFLAGS on syscall 

kernel/arch/amd64/src/userspace.c

@@ -65 +65 @@
                 "xorq %%rdi, %%rdi\n"
                 "iretq\n"
-                :: [udata_des] "i" (gdtselector(UDATA_DES) | PL_USER),
+                :: [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER),
                    [stack_size] "r" (kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
                    [ipl] "r" (ipl),
-                   [utext_des] "i" (gdtselector(UTEXT_DES) | PL_USER),
+                   [utext_des] "i" (GDT_SELECTOR(UTEXT_DES) | PL_USER),
                    [entry] "r" (kernel_uarg->uspace_entry),
                    [uarg] "r" (kernel_uarg->uspace_uarg)

kernel/arch/arm32/include/mach/integratorcp/integratorcp.h

@@ -105 +105 @@
 extern void icp_get_memory_extents(uintptr_t *, uintptr_t *);
 extern void icp_frame_init(void);
+extern size_t icp_get_irq_count(void);
 
 extern struct arm_machine_ops icp_machine_ops;

kernel/arch/arm32/include/mach/testarm/testarm.h

@@ -73 +73 @@
 extern void gxemul_get_memory_extents(uintptr_t *, uintptr_t *);
 extern void gxemul_frame_init(void);
+extern size_t gxemul_get_irq_count(void);
 
 extern struct arm_machine_ops gxemul_machine_ops;

kernel/arch/arm32/include/machine_func.h

@@ -55 +55 @@
         void (*machine_output_init)(void);
         void (*machine_input_init)(void);
+        size_t (*machine_get_irq_count)(void);
 };
 

kernel/arch/arm32/src/mach/gta02/gta02.c

@@ -43 +43 @@
 #include <genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h>
 #include <genarch/drivers/s3c24xx_timer/s3c24xx_timer.h>
+#include <genarch/srln/srln.h>
+#include <sysinfo/sysinfo.h>
 #include <interrupt.h>
 #include <ddi/ddi.h>
@@ -68 +70 @@
 static void gta02_output_init(void);
 static void gta02_input_init(void);
+static size_t gta02_get_irq_count(void);
 
 static void gta02_timer_irq_init(void);
@@ -74 +77 @@
 static void gta02_timer_irq_handler(irq_t *irq);
 
-static void *gta02_scons_out;
-static s3c24xx_irqc_t *gta02_irqc;
+static outdev_t *gta02_scons_dev;
+static s3c24xx_irqc_t gta02_irqc;
 static s3c24xx_timer_t *gta02_timer;
 
@@ -88 +91 @@
         gta02_frame_init,
         gta02_output_init,
-        gta02_input_init
+        gta02_input_init,
+        gta02_get_irq_count
 };
 
 static void gta02_init(void)
 {
-        gta02_scons_out = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE);
-        gta02_irqc = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);
+        s3c24xx_irqc_regs_t *irqc_regs;
+
         gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE);
-
-        /* Make all interrupt sources use IRQ mode (not FIQ). */
-        pio_write_32(&gta02_irqc->intmod, 0x00000000);
-
-        /* Disable all interrupt sources. */
-        pio_write_32(&gta02_irqc->intmsk, 0xffffffff);
-
-        /* Disable interrupts from all sub-sources. */
-        pio_write_32(&gta02_irqc->intsubmsk, 0xffffffff);
+        irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);
+
+        /* Initialize interrupt controller. */
+        s3c24xx_irqc_init(&gta02_irqc, irqc_regs);
 }
 
@@ -132 +131 @@
         uint32_t inum;
 
-        inum = pio_read_32(&gta02_irqc->intoffset);
+        /* Determine IRQ number. */
+        inum = s3c24xx_irqc_inum_get(&gta02_irqc);
+
+        /* Clear interrupt condition in the interrupt controller. */
+        s3c24xx_irqc_clear(&gta02_irqc, inum);
 
         irq_t *irq = irq_dispatch_and_lock(inum);
@@ -144 +147 @@
                     CPU->id, inum);
         }
-
-        /* Clear interrupt condition in the interrupt controller. */
-        pio_write_32(&gta02_irqc->srcpnd, S3C24XX_INT_BIT(inum));
-        pio_write_32(&gta02_irqc->intpnd, S3C24XX_INT_BIT(inum));
 }
 
@@ -176 +175 @@
         }
 #endif
-        outdev_t *scons_dev;
-
-        scons_dev = s3c24xx_uart_init((ioport8_t *) gta02_scons_out);
-        if (scons_dev)
-                stdout_wire(scons_dev);
+
+        /* Initialize serial port of the debugging console. */
+        s3c24xx_uart_io_t *scons_io;
+
+        scons_io = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE);
+        gta02_scons_dev = s3c24xx_uart_init(scons_io, S3C24XX_INT_UART2);
+
+        if (gta02_scons_dev) {
+                /* Create output device. */
+                stdout_wire(gta02_scons_dev);
+        }
+
+        /*
+         * This is the necessary evil until the userspace driver is entirely
+         * self-sufficient.
+         */
+        sysinfo_set_item_val("s3c24xx_uart", NULL, true);
+        sysinfo_set_item_val("s3c24xx_uart.inr", NULL, S3C24XX_INT_UART2);
+        sysinfo_set_item_val("s3c24xx_uart.address.physical", NULL,
+            (uintptr_t) GTA02_SCONS_BASE);
+
 }
 
 static void gta02_input_init(void)
 {
+        s3c24xx_uart_t *scons_inst;
+
+        if (gta02_scons_dev) {
+                /* Create input device. */
+                scons_inst = (void *) gta02_scons_dev->data;
+
+                srln_instance_t *srln_instance = srln_init();
+                if (srln_instance) {
+                        indev_t *sink = stdin_wire();
+                        indev_t *srln = srln_wire(srln_instance, sink);
+                        s3c24xx_uart_input_wire(scons_inst, srln);
+
+                        /* Enable interrupts from UART2 */
+                        s3c24xx_irqc_src_enable(&gta02_irqc,
+                            S3C24XX_INT_UART2);
+
+                        /* Enable interrupts from UART2 RXD */
+                        s3c24xx_irqc_subsrc_enable(&gta02_irqc,
+                            S3C24XX_SUBINT_RXD2);
+                }
+        }
+
+        /* Enable interrupts from ADC */
+        s3c24xx_irqc_src_enable(&gta02_irqc, S3C24XX_INT_ADC);
+
+        /* Enable interrupts from ADC sub-sources */
+        s3c24xx_irqc_subsrc_enable(&gta02_irqc, S3C24XX_SUBINT_ADC_S);
+        s3c24xx_irqc_subsrc_enable(&gta02_irqc, S3C24XX_SUBINT_TC);
+}
+
+size_t gta02_get_irq_count(void)
+{
+        return GTA02_IRQ_COUNT;
 }
 
@@ -248 +296 @@
 
         /* Enable interrupts from timer0 */
-        pio_write_32(&gta02_irqc->intmsk, pio_read_32(&gta02_irqc->intmsk) &
-            ~S3C24XX_INT_BIT(S3C24XX_INT_TIMER0));
+        s3c24xx_irqc_src_enable(&gta02_irqc, S3C24XX_INT_TIMER0);
 
         /* Load data from tcntb0/tcmpb0 into tcnt0/tcmp0. */

kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

@@ -64 +64 @@
         icp_frame_init,
         icp_output_init,
-        icp_input_init
+        icp_input_init,
+        icp_get_irq_count
 };
 
@@ -336 +337 @@
 }
 
+size_t icp_get_irq_count(void)
+{
+        return ICP_IRQ_COUNT;
+}
 
 /** @}

kernel/arch/arm32/src/mach/testarm/testarm.c

@@ -64 +64 @@
         gxemul_frame_init,
         gxemul_output_init,
-        gxemul_input_init
+        gxemul_input_init,
+        gxemul_get_irq_count
 };
 
@@ -126 +127 @@
 }
 
+size_t gxemul_get_irq_count(void)
+{
+        return GXEMUL_IRQ_COUNT;
+}
+
 /** Starts gxemul Real Time Clock device, which asserts regular interrupts.
  *

kernel/arch/arm32/src/machine_func.c

@@ -128 +128 @@
 size_t machine_get_irq_count(void)
 {
-        size_t irq_count;
- 
-#if defined(MACHINE_gta02)
-        irq_count = GTA02_IRQ_COUNT;
-#elif defined(MACHINE_testarm)
-        irq_count = GXEMUL_IRQ_COUNT;
-#elif defined(MACHINE_integratorcp)
-        irq_count = ICP_IRQ_COUNT;
-#else
-#error Machine type not defined.
-#endif
-        return irq_count;
+        return (machine_ops->machine_get_irq_count)();
 }
 

kernel/arch/ia32/include/bios/bios.h

@@ -38 +38 @@
 #include <typedefs.h>
 
-#define BIOS_EBDA_PTR  0x40e
-
 extern uintptr_t ebda;
 

kernel/arch/ia32/include/mm/as.h

@@ -27 +27 @@
  */
 
-/** @addtogroup ia32mm  
+/** @addtogroup ia32mm
  * @{
  */

kernel/arch/ia32/include/mm/page.h

@@ -27 +27 @@
  */
 
-/** @addtogroup ia32mm  
+/** @addtogroup ia32mm
  * @{
  */
@@ -106 +106 @@
 
 /* Set PTE flags accessors for each level. */
-#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
         set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)

kernel/arch/ia32/include/pm.h

@@ -58 +58 @@
 #endif /* CONFIG_FB */
 
-#define gdtselector(des)  ((des) << 3)
+#define GDT_SELECTOR(des)  ((des) << 3)
 
 #define PL_KERNEL  0
@@ -153 +153 @@
 
 extern ptr_16_32_t gdtr;
-extern ptr_16_32_t bootstrap_gdtr;
 extern ptr_16_32_t protected_ap_gdtr;
 extern tss_t *tss_p;

kernel/arch/ia32/src/asm.S

@@ -225 +225 @@
          * Switch to kernel selectors.
          */
-        movw $(gdtselector(KDATA_DES)), %ax
+        movw $(GDT_SELECTOR(KDATA_DES)), %ax
         movw %ax, %ds
         movw %ax, %es
@@ -304 +304 @@
          * Switch to kernel selectors.
          */
-        movl $(gdtselector(KDATA_DES)), %eax
+        movl $(GDT_SELECTOR(KDATA_DES)), %eax
         movl %eax, %ds
         movl %eax, %es
@@ -407 +407 @@
          * Switch to kernel selectors.
          */
-        movl $(gdtselector(KDATA_DES)), %eax
+        movl $(GDT_SELECTOR(KDATA_DES)), %eax
         movl %eax, %ds
         movl %eax, %es
@@ -416 +416 @@
          */
         xorl %eax, %eax
-        cmpl $(gdtselector(KTEXT_DES)), ISTATE_OFFSET_CS(%esp)
+        cmpl $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%esp)
         cmovnzl %eax, %ebp
 

kernel/arch/ia32/src/bios/bios.c

@@ -36 +36 @@
 #include <typedefs.h>
 
+#define BIOS_EBDA_PTR  0x40e
+
 uintptr_t ebda = 0;
 

kernel/arch/ia32/src/boot/boot.S

@@ -78 +78 @@
         
         /* Initialize Global Descriptor Table register */
-        lgdtl KA2PA(bootstrap_gdtr)
+        lgdtl bootstrap_gdtr
         
         /* Kernel data + stack */
-        movw $gdtselector(KDATA_DES), %cx
+        movw $GDT_SELECTOR(KDATA_DES), %cx
         movw %cx, %es
         movw %cx, %fs
@@ -88 +88 @@
         movw %cx, %ss
         
-        jmpl $gdtselector(KTEXT_DES), $multiboot_meeting_point
+        jmpl $GDT_SELECTOR(KTEXT_DES), $multiboot_meeting_point
         multiboot_meeting_point:
         
@@ -514 +514 @@
 page_directory:
         .space 4096, 0
+
+bootstrap_gdtr:
+        .word GDT_SELECTOR(GDT_ITEMS)
+        .long KA2PA(gdt)
 
 grub_eax:

kernel/arch/ia32/src/boot/vesa_real.inc

@@ -30 +30 @@
 .code32
 vesa_init:
-        jmp $gdtselector(VESA_INIT_DES), $vesa_init_real - vesa_init
+        jmp $GDT_SELECTOR(VESA_INIT_DES), $vesa_init_real - vesa_init
 
 .code16
@@ -335 +335 @@
                 vesa_leave_real2:
                 
-                        ljmpl $gdtselector(KTEXT32_DES), $(vesa_init_protected - vesa_init + VESA_INIT_SEGMENT << 4)
+                        ljmpl $GDT_SELECTOR(KTEXT32_DES), $(vesa_init_protected - vesa_init + VESA_INIT_SEGMENT << 4)
         
         no_mode:

kernel/arch/ia32/src/boot/vesa_ret.inc

@@ -7 +7 @@
         
         /* Kernel data + stack */
-        movw $gdtselector(KDATA_DES), %cx
+        movw $GDT_SELECTOR(KDATA_DES), %cx
         movw %cx, %es
         movw %cx, %fs
@@ -14 +14 @@
         movw %cx, %ss
         
-        jmpl $gdtselector(KTEXT_DES), $vesa_meeting_point
+        jmpl $GDT_SELECTOR(KTEXT_DES), $vesa_meeting_point

kernel/arch/ia32/src/ddi/ddi.c

@@ -153 +153 @@
          */
         gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
-        tr_load(gdtselector(TSS_DES));
+        tr_load(GDT_SELECTOR(TSS_DES));
         
         /*

kernel/arch/ia32/src/mm/frame.c

@@ -131 +131 @@
                         if (last_frame < ALIGN_UP(new_base + new_size, FRAME_SIZE))
                                 last_frame = ALIGN_UP(new_base + new_size, FRAME_SIZE);
-                }
-                
-                if (e820table[i].type == MEMMAP_MEMORY_RESERVED) {
+                } else if ((e820table[i].type == MEMMAP_MEMORY_ACPI) ||
+                    (e820table[i].type == MEMMAP_MEMORY_NVS)) {
+                        /* To be safe, make the firmware zone possibly larger */
+                        uint64_t new_base = ALIGN_DOWN(base, FRAME_SIZE);
+                        uint64_t new_size = ALIGN_UP(size + (base - new_base),
+                            FRAME_SIZE);
+                        
+                        zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
+                            ZONE_FIRMWARE);
+                } else {
                         /* To be safe, make the reserved zone possibly larger */
                         uint64_t new_base = ALIGN_DOWN(base, FRAME_SIZE);
@@ -141 +148 @@
                         zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
                             ZONE_RESERVED);
-                }
-                
-                if (e820table[i].type == MEMMAP_MEMORY_ACPI) {
-                        /* To be safe, make the firmware zone possibly larger */
-                        uint64_t new_base = ALIGN_DOWN(base, FRAME_SIZE);
-                        uint64_t new_size = ALIGN_UP(size + (base - new_base),
-                            FRAME_SIZE);
-                        
-                        zone_create(ADDR2PFN(new_base), SIZE2FRAMES(new_size), 0,
-                            ZONE_FIRMWARE);
                 }
         }
@@ -203 +200 @@
 #ifdef CONFIG_SMP
                 /* Reserve AP real mode bootstrap memory */
-                frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH, 
+                frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH,
                     (hardcoded_unmapped_ktext_size +
                     hardcoded_unmapped_kdata_size) >> FRAME_WIDTH);

kernel/arch/ia32/src/pm.c

@@ -75 +75 @@
         /* VESA Init descriptor */
 #ifdef CONFIG_FB
-        { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
-#endif  
+        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+#endif
 };
 
@@ -86 +86 @@
 
 /* gdtr is changed by kmp before next CPU is initialized */
-ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((uintptr_t) gdt) };
-ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (uintptr_t) gdt };
+ptr_16_32_t gdtr = {
+        .limit = sizeof(gdt),
+        .base = (uintptr_t) gdt
+};
 
 void gdt_setbase(descriptor_t *d, uintptr_t base)
@@ -128 +130 @@
 
                 d->unused = 0;
-                d->selector = gdtselector(KTEXT_DES);
+                d->selector = GDT_SELECTOR(KTEXT_DES);
 
                 if (i == VECTOR_SYSCALL) {
@@ -283 +285 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(gdtselector(TSS_DES));
+        tr_load(GDT_SELECTOR(TSS_DES));
         
         clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */

kernel/arch/ia32/src/proc/scheduler.c

@@ -67 +67 @@
         /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
         CPU->arch.tss->esp0 = kstk;
-        CPU->arch.tss->ss0 = gdtselector(KDATA_DES);
+        CPU->arch.tss->ss0 = GDT_SELECTOR(KDATA_DES);
         
         /* Set up TLS in GS register */

kernel/arch/ia32/src/syscall.c

@@ -45 +45 @@
 
         /* set kernel mode CS selector */
-        write_msr(IA32_MSR_SYSENTER_CS, gdtselector(KTEXT_DES));
+        write_msr(IA32_MSR_SYSENTER_CS, GDT_SELECTOR(KTEXT_DES));
         /* set kernel mode entry point */
         write_msr(IA32_MSR_SYSENTER_EIP, (uint32_t) sysenter_handler);

kernel/arch/ia32/src/userspace.c

@@ -75 +75 @@
                 "iret\n"
                 :
-                : [udata_des] "i" (gdtselector(UDATA_DES) | PL_USER),
+                : [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER),
                   [stack_size] "r" ((uint8_t *) kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
                   [ipl] "r" (ipl),
-                  [utext_des] "i" (gdtselector(UTEXT_DES) | PL_USER),
+                  [utext_des] "i" (GDT_SELECTOR(UTEXT_DES) | PL_USER),
                   [entry] "r" (kernel_uarg->uspace_entry),
                   [uarg] "r" (kernel_uarg->uspace_uarg),
-                  [tls_des] "r" (gdtselector(TLS_DES))
+                  [tls_des] "r" (GDT_SELECTOR(TLS_DES))
                 : "eax");
         

kernel/arch/mips32/include/context_offset.h

@@ -60 +60 @@
 # define OFFSET_F30     0x5c
 #endif /* KERNEL */
-
-/* istate_t */
-#define EOFFSET_AT     0x0
-#define EOFFSET_V0     0x4
-#define EOFFSET_V1     0x8
-#define EOFFSET_A0     0xc
-#define EOFFSET_A1     0x10
-#define EOFFSET_A2     0x14
-#define EOFFSET_A3     0x18
-#define EOFFSET_T0     0x1c
-#define EOFFSET_T1     0x20
-#define EOFFSET_T2     0x24
-#define EOFFSET_T3     0x28
-#define EOFFSET_T4     0x2c
-#define EOFFSET_T5     0x30
-#define EOFFSET_T6     0x34
-#define EOFFSET_T7     0x38
-#define EOFFSET_T8     0x3c
-#define EOFFSET_T9     0x40
-#define EOFFSET_GP     0x44
-#define EOFFSET_SP     0x48
-#define EOFFSET_RA     0x4c
-#define EOFFSET_LO     0x50
-#define EOFFSET_HI     0x54
-#define EOFFSET_STATUS 0x58
-#define EOFFSET_EPC    0x5c
-#define EOFFSET_K1     0x60
-#define REGISTER_SPACE 104      /* respect stack alignment */
 
 #ifdef __ASM__

kernel/arch/mips32/include/exception.h

@@ -60 +60 @@
 
 typedef struct istate {
+        /*
+         * The first seven registers are arranged so that the istate structure
+         * can be used both for exception handlers and for the syscall handler.
+         */
+        uint32_t a0;    /* arg1 */
+        uint32_t a1;    /* arg2 */
+        uint32_t a2;    /* arg3 */
+        uint32_t a3;    /* arg4 */
+        uint32_t t0;    /* arg5 */
+        uint32_t t1;    /* arg6 */
+        uint32_t v0;    /* arg7 */
+        uint32_t v1;
         uint32_t at;
-        uint32_t v0;
-        uint32_t v1;
-        uint32_t a0;
-        uint32_t a1;
-        uint32_t a2;
-        uint32_t a3;
-        uint32_t t0;
-        uint32_t t1;
         uint32_t t2;
         uint32_t t3;
@@ -75 +79 @@
         uint32_t t6;
         uint32_t t7;
+        uint32_t s0;
+        uint32_t s1;
+        uint32_t s2;
+        uint32_t s3;
+        uint32_t s4;
+        uint32_t s5;
+        uint32_t s6;
+        uint32_t s7;
         uint32_t t8;
         uint32_t t9;
+        uint32_t kt0;
+        uint32_t kt1;   /* We use it as thread-local pointer */
         uint32_t gp;
         uint32_t sp;
+        uint32_t s8;
         uint32_t ra;
         
@@ -84 +99 @@
         uint32_t hi;
         
-        uint32_t status;  /* cp0_status */
-        uint32_t epc;     /* cp0_epc */
-        uint32_t k1;      /* We use it as thread-local pointer */
+        uint32_t status;        /* cp0_status */
+        uint32_t epc;           /* cp0_epc */
+
+        uint32_t alignment;     /* to make sizeof(istate_t) a multiple of 8 */
 } istate_t;
 
@@ -108 +124 @@
 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
 {
-        /* FIXME */
-        
-        return 0;
+        return istate->sp;
 }
 

kernel/arch/mips32/include/smp/dorder.h

@@ -1 +1 @@
 /*
- * Copyright (c) 2010 Martin Decky
+ * Copyright (c) 2007 Martin Decky
  * All rights reserved.
  *
@@ -27 +27 @@
  */
 
-/** @addtogroup netif_standalone
- *  @{
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
  */
 
-#ifndef __NETIF_NIL_BUNDLE_H__
-#define __NETIF_NIL_BUNDLE_H__
+#ifndef KERN_mips32_DORDER_H_
+#define KERN_mips32_DORDER_H_
 
-#include <ipc/ipc.h>
-#include <async.h>
+#include <typedefs.h>
 
-extern int netif_nil_module_message(const char *, ipc_callid_t, ipc_call_t *,
-    ipc_call_t *, int *);
-extern int netif_nil_module_start(async_client_conn_t);
+extern uint32_t dorder_cpuid(void);
+extern void dorder_ipi_ack(uint32_t);
 
 #endif

kernel/arch/mips32/src/debug/stacktrace.c

@@ -31 +31 @@
  */
 /** @file
+ */
+
+/*
+ * This stack tracing code is based on the suggested algorithm described on page
+ * 3-27 and 3-28 of:
+ * 
+ * SYSTEM V
+ * APPLICATION BINARY INTERFACE
+ *
+ * MIPS RISC Processor
+ * Supplement
+ * 3rd Edition
+ *
+ * Unfortunately, GCC generates code which is not entirely compliant with this
+ * method. For example, it places the "jr ra" instruction quite arbitrarily in
+ * the middle of the function which makes the original algorithm unapplicable.
+ *
+ * We deal with this problem by simply not using those parts of the algorithm
+ * that rely on the "jr ra" instruction occurring in the last basic block of a
+ * function, which gives us still usable, but less reliable stack tracer. The
+ * unreliability stems from the fact that under some circumstances it can become
+ * confused and produce incorrect or incomplete stack trace. We apply extra
+ * sanity checks so that the algorithm is still safe and should not crash the
+ * system.
+ *
+ * Even though not perfect, our solution is pretty lightweight, especially when
+ * compared with a prospective alternative solution based on additional
+ * debugging information stored directly in the kernel image.
  */
 
@@ -96 +124 @@
 extern char ktext_end;
 
+static bool bounds_check(uintptr_t pc)
+{
+        return (pc >= (uintptr_t) &ktext_start) &&
+            (pc < (uintptr_t) &ktext_end);
+}
+
 static bool
 scan(stack_trace_context_t *ctx, uintptr_t *prev_fp, uintptr_t *prev_ra)
@@ -106 +140 @@
         do {
                 inst--;
+                if (!bounds_check((uintptr_t) inst))
+                        return false;
 #if 0
                 /*
@@ -180 +216 @@
                                         return false;
                                 /* too big offsets are suspicious */
-                                if (offset > 32 * 4)
+                                if ((size_t) offset > sizeof(istate_t))
                                         return false;
 
@@ -207 +243 @@
 {
         return !((ctx->fp == 0) || ((ctx->fp % 8) != 0) ||
-            (ctx->pc % 4 != 0) || (ctx->pc < (uintptr_t) &ktext_start) ||
-            (ctx->pc >= (uintptr_t) &ktext_end));
+            (ctx->pc % 4 != 0) || !bounds_check(ctx->pc));
 }
 

kernel/arch/mips32/src/exception.c

@@ -74 +74 @@
 void istate_decode(istate_t *istate)
 {
-        printf("at=%p\tv0=%p\tv1=%p\n", istate->at, istate->v0, istate->v1);
-        printf("a0=%p\ta1=%p\ta2=%p\n", istate->a0, istate->a1, istate->a2);
-        printf("a3=%p\tt0=%p\tt1=%p\n", istate->a3, istate->t0, istate->t1);
-        printf("t2=%p\tt3=%p\tt4=%p\n", istate->t2, istate->t3, istate->t4);
-        printf("t5=%p\tt6=%p\tt7=%p\n", istate->t5, istate->t6, istate->t7);
-        printf("t8=%p\tt9=%p\tgp=%p\n", istate->t8, istate->t9, istate->gp);
-        printf("sp=%p\tra=%p\t\n", istate->sp, istate->ra);
-        printf("lo=%p\thi=%p\t\n", istate->lo, istate->hi);
-        printf("cp0_status=%p\tcp0_epc=%p\tk1=%p\n",
-            istate->status, istate->epc, istate->k1);
+        printf("epc=%p\tsta=%p\tlo =%p\thi =%p\n",
+            istate->epc, istate->status, istate->lo, istate->hi);
+        printf("a0 =%p\ta1 =%p\ta2 =%p\ta3 =%p\n",
+            istate->a0, istate->a1, istate->a2, istate->a3);
+        printf("t0 =%p\tt1 =%p\tt2 =%p\tt3 =%p\n",
+            istate->t0, istate->t1, istate->t2, istate->t3);
+        printf("t4 =%p\tt5 =%p\tt6 =%p\tt7 =%p\n",
+            istate->t4, istate->t5, istate->t6, istate->t7);
+        printf("t8 =%p\tt9 =%p\tv0 =%p\tv1 =%p\n",
+            istate->t8, istate->t9, istate->v0, istate->v1);
+        printf("s0 =%p\ts1 =%p\ts2 =%p\ts3 =%p\n",
+            istate->s0, istate->s1, istate->s2, istate->s3);
+        printf("s4 =%p\ts5 =%p\ts6 =%p\ts7 =%p\n",
+            istate->s4, istate->s5, istate->s6, istate->s7);
+        printf("s8 =%p\tat =%p\tkt0=%p\tkt1=%p\n",
+            istate->s8, istate->at, istate->kt0, istate->kt1);
+        printf("sp =%p\tra =%p\tgp =%p\n",
+            istate->sp, istate->ra, istate->gp);
 }
 
@@ -97 +105 @@
                 ASSERT(THREAD);
                 istate->epc += 4;
-                istate->v1 = istate->k1;
+                istate->v1 = istate->kt1;
         } else
                 unhandled_exception(n, istate);

kernel/arch/mips32/src/interrupt.c

@@ -38 +38 @@
 #include <arch.h>
 #include <arch/cp0.h>
+#include <arch/smp/dorder.h>
 #include <time/clock.h>
 #include <ipc/sysipc.h>
@@ -48 +49 @@
 function virtual_timer_fnc = NULL;
 static irq_t timer_irq;
+static irq_t dorder_irq;
 
 // TODO: This is SMP unsafe!!!
@@ -149 +151 @@
 }
 
+static irq_ownership_t dorder_claim(irq_t *irq)
+{
+        return IRQ_ACCEPT;
+}
+
+static void dorder_irq_handler(irq_t *irq)
+{
+        dorder_ipi_ack(1 << dorder_cpuid());
+}
+
 /* Initialize basic tables for exception dispatching */
 void interrupt_init(void)
@@ -163 +175 @@
         timer_start();
         cp0_unmask_int(TIMER_IRQ);
+        
+        irq_initialize(&dorder_irq);
+        dorder_irq.devno = device_assign_devno();
+        dorder_irq.inr = DORDER_IRQ;
+        dorder_irq.claim = dorder_claim;
+        dorder_irq.handler = dorder_irq_handler;
+        irq_register(&dorder_irq);
+        
+        cp0_unmask_int(DORDER_IRQ);
 }
 

kernel/arch/mips32/src/smp/dorder.c

@@ -33 +33 @@
  */
 
+#include <typedefs.h>
 #include <smp/ipi.h>
+#include <arch/smp/dorder.h>
+
+#define MSIM_DORDER_ADDRESS  0xB0000004
 
 #ifdef CONFIG_SMP
 
-#define MSIM_DORDER_ADDRESS  0xB0000004
-
 void ipi_broadcast_arch(int ipi)
 {
-        *((volatile unsigned int *) MSIM_DORDER_ADDRESS) = 0x7FFFFFFF;
+        *((volatile uint32_t *) MSIM_DORDER_ADDRESS) = 0x7fffffff;
 }
 
 #endif
 
+uint32_t dorder_cpuid(void)
+{
+        return *((volatile uint32_t *) MSIM_DORDER_ADDRESS);
+}
+
+void dorder_ipi_ack(uint32_t mask)
+{
+        *((volatile uint32_t *) (MSIM_DORDER_ADDRESS + 4)) = mask;
+}
+
 /** @}
  */

kernel/arch/mips32/src/start.S

@@ -46 +46 @@
 
 /*
- * Which status bits should are thread-local:
+ * Which status bits are thread-local:
  * KSU(UM), EXL, ERL, IE
  */
 #define REG_SAVE_MASK 0x1f
+
+#define ISTATE_OFFSET_A0        0
+#define ISTATE_OFFSET_A1        4
+#define ISTATE_OFFSET_A2        8
+#define ISTATE_OFFSET_A3        12
+#define ISTATE_OFFSET_T0        16
+#define ISTATE_OFFSET_T1        20
+#define ISTATE_OFFSET_V0        24
+#define ISTATE_OFFSET_V1        28
+#define ISTATE_OFFSET_AT        32
+#define ISTATE_OFFSET_T2        36
+#define ISTATE_OFFSET_T3        40
+#define ISTATE_OFFSET_T4        44
+#define ISTATE_OFFSET_T5        48
+#define ISTATE_OFFSET_T6        52
+#define ISTATE_OFFSET_T7        56
+#define ISTATE_OFFSET_S0        60
+#define ISTATE_OFFSET_S1        64
+#define ISTATE_OFFSET_S2        68
+#define ISTATE_OFFSET_S3        72
+#define ISTATE_OFFSET_S4        76
+#define ISTATE_OFFSET_S5        80
+#define ISTATE_OFFSET_S6        84
+#define ISTATE_OFFSET_S7        88
+#define ISTATE_OFFSET_T8        92
+#define ISTATE_OFFSET_T9        96
+#define ISTATE_OFFSET_KT0       100
+#define ISTATE_OFFSET_KT1       104
+#define ISTATE_OFFSET_GP        108
+#define ISTATE_OFFSET_SP        112
+#define ISTATE_OFFSET_S8        116
+#define ISTATE_OFFSET_RA        120
+#define ISTATE_OFFSET_LO        124
+#define ISTATE_OFFSET_HI        128
+#define ISTATE_OFFSET_STATUS    132
+#define ISTATE_OFFSET_EPC       136
+#define ISTATE_OFFSET_ALIGNMENT 140
+
+#define ISTATE_SOFT_SIZE        144
+
+/*
+ * The fake ABI prologue is never executed and may not be part of the
+ * procedure's body. Instead, it should be immediately preceding the procedure's
+ * body. Its only purpose is to trick the stack trace walker into thinking that
+ * the exception is more or less just a normal function call.
+ */
+.macro FAKE_ABI_PROLOGUE
+        sub $sp, ISTATE_SOFT_SIZE
+        sw $ra, ISTATE_OFFSET_EPC($sp)
+.endm
 
 /*
@@ -58 +108 @@
  */
 .macro REGISTERS_STORE_AND_EXC_RESET r
-        sw $at, EOFFSET_AT(\r)
-        sw $v0, EOFFSET_V0(\r)
-        sw $v1, EOFFSET_V1(\r)
-        sw $a0, EOFFSET_A0(\r)
-        sw $a1, EOFFSET_A1(\r)
-        sw $a2, EOFFSET_A2(\r)
-        sw $a3, EOFFSET_A3(\r)
-        sw $t0, EOFFSET_T0(\r)
-        sw $t1, EOFFSET_T1(\r)
-        sw $t2, EOFFSET_T2(\r)
-        sw $t3, EOFFSET_T3(\r)
-        sw $t4, EOFFSET_T4(\r)
-        sw $t5, EOFFSET_T5(\r)
-        sw $t6, EOFFSET_T6(\r)
-        sw $t7, EOFFSET_T7(\r)
-        sw $t8, EOFFSET_T8(\r)
-        sw $t9, EOFFSET_T9(\r)
+        sw $at, ISTATE_OFFSET_AT(\r)
+        sw $v0, ISTATE_OFFSET_V0(\r)
+        sw $v1, ISTATE_OFFSET_V1(\r)
+        sw $a0, ISTATE_OFFSET_A0(\r)
+        sw $a1, ISTATE_OFFSET_A1(\r)
+        sw $a2, ISTATE_OFFSET_A2(\r)
+        sw $a3, ISTATE_OFFSET_A3(\r)
+        sw $t0, ISTATE_OFFSET_T0(\r)
+        sw $t1, ISTATE_OFFSET_T1(\r)
+        sw $t2, ISTATE_OFFSET_T2(\r)
+        sw $t3, ISTATE_OFFSET_T3(\r)
+        sw $t4, ISTATE_OFFSET_T4(\r)
+        sw $t5, ISTATE_OFFSET_T5(\r)
+        sw $t6, ISTATE_OFFSET_T6(\r)
+        sw $t7, ISTATE_OFFSET_T7(\r)
+        sw $t8, ISTATE_OFFSET_T8(\r)
+        sw $t9, ISTATE_OFFSET_T9(\r)
+        sw $s0, ISTATE_OFFSET_S0(\r)
+        sw $s1, ISTATE_OFFSET_S1(\r)
+        sw $s2, ISTATE_OFFSET_S2(\r)
+        sw $s3, ISTATE_OFFSET_S3(\r)
+        sw $s4, ISTATE_OFFSET_S4(\r)
+        sw $s5, ISTATE_OFFSET_S5(\r)
+        sw $s6, ISTATE_OFFSET_S6(\r)
+        sw $s7, ISTATE_OFFSET_S7(\r)
+        sw $s8, ISTATE_OFFSET_S8(\r)
         
         mflo $at
-        sw $at, EOFFSET_LO(\r)
+        sw $at, ISTATE_OFFSET_LO(\r)
         mfhi $at
-        sw $at, EOFFSET_HI(\r)
-        
-        sw $gp, EOFFSET_GP(\r)
-        sw $ra, EOFFSET_RA(\r)
-        sw $k1, EOFFSET_K1(\r)
+        sw $at, ISTATE_OFFSET_HI(\r)
+        
+        sw $gp, ISTATE_OFFSET_GP(\r)
+        sw $ra, ISTATE_OFFSET_RA(\r)
+        sw $k0, ISTATE_OFFSET_KT0(\r)
+        sw $k1, ISTATE_OFFSET_KT1(\r)
         
         mfc0 $t0, $status
@@ -95 +155 @@
         and $t0, $t0, $t3
         
-        sw $t2, EOFFSET_STATUS(\r)
-        sw $t1, EOFFSET_EPC(\r)
+        sw $t2, ISTATE_OFFSET_STATUS(\r)
+        sw $t1, ISTATE_OFFSET_EPC(\r)
         mtc0 $t0, $status
 .endm
@@ -106 +166 @@
          */
         mfc0 $t0, $status
-        lw $t1,EOFFSET_STATUS(\r)
+        lw $t1, ISTATE_OFFSET_STATUS(\r)
         
         /* mask UM, EXL, ERL, IE */
@@ -116 +176 @@
         mtc0 $t0, $status
         
-        lw $v0, EOFFSET_V0(\r)
-        lw $v1, EOFFSET_V1(\r)
-        lw $a0, EOFFSET_A0(\r)
-        lw $a1, EOFFSET_A1(\r)
-        lw $a2, EOFFSET_A2(\r)
-        lw $a3, EOFFSET_A3(\r)
-        lw $t0, EOFFSET_T0(\r)
-        lw $t1, EOFFSET_T1(\r)
-        lw $t2, EOFFSET_T2(\r)
-        lw $t3, EOFFSET_T3(\r)
-        lw $t4, EOFFSET_T4(\r)
-        lw $t5, EOFFSET_T5(\r)
-        lw $t6, EOFFSET_T6(\r)
-        lw $t7, EOFFSET_T7(\r)
-        lw $t8, EOFFSET_T8(\r)
-        lw $t9, EOFFSET_T9(\r)
-        
-        lw $gp, EOFFSET_GP(\r)
-        lw $ra, EOFFSET_RA(\r)
-        lw $k1, EOFFSET_K1(\r)
-        
-        lw $at, EOFFSET_LO(\r)
+        lw $v0, ISTATE_OFFSET_V0(\r)
+        lw $v1, ISTATE_OFFSET_V1(\r)
+        lw $a0, ISTATE_OFFSET_A0(\r)
+        lw $a1, ISTATE_OFFSET_A1(\r)
+        lw $a2, ISTATE_OFFSET_A2(\r)
+        lw $a3, ISTATE_OFFSET_A3(\r)
+        lw $t0, ISTATE_OFFSET_T0(\r)
+        lw $t1, ISTATE_OFFSET_T1(\r)
+        lw $t2, ISTATE_OFFSET_T2(\r)
+        lw $t3, ISTATE_OFFSET_T3(\r)
+        lw $t4, ISTATE_OFFSET_T4(\r)
+        lw $t5, ISTATE_OFFSET_T5(\r)
+        lw $t6, ISTATE_OFFSET_T6(\r)
+        lw $t7, ISTATE_OFFSET_T7(\r)
+        lw $t8, ISTATE_OFFSET_T8(\r)
+        lw $t9, ISTATE_OFFSET_T9(\r)
+        
+        lw $gp, ISTATE_OFFSET_GP(\r)
+        lw $ra, ISTATE_OFFSET_RA(\r)
+        lw $k1, ISTATE_OFFSET_KT1(\r)
+        
+        lw $at, ISTATE_OFFSET_LO(\r)
         mtlo $at
-        lw $at, EOFFSET_HI(\r)
+        lw $at, ISTATE_OFFSET_HI(\r)
         mthi $at
         
-        lw $at, EOFFSET_EPC(\r)
+        lw $at, ISTATE_OFFSET_EPC(\r)
         mtc0 $at, $epc
         
-        lw $at, EOFFSET_AT(\r)
-        lw $sp, EOFFSET_SP(\r)
+        lw $at, ISTATE_OFFSET_AT(\r)
+        lw $sp, ISTATE_OFFSET_SP(\r)
 .endm
 
@@ -159 +219 @@
         
         beq $k0, $0, 1f
-        add $k0, $sp, 0
+        move $k0, $sp
         
         /* move $k0 pointer to kernel stack */
@@ -166 +226 @@
         
         /* move $k0 (supervisor_sp) */
-        lw $k0, 0($k0)
+        lw $k0, ($k0)
         
         1:
@@ -202 +262 @@
         nop
 
+        FAKE_ABI_PROLOGUE
 exception_handler:
         KERNEL_STACK_TO_K0
         
-        sub $k0, REGISTER_SPACE
-        sw $sp, EOFFSET_SP($k0)
+        sub $k0, ISTATE_SOFT_SIZE
+        sw $sp, ISTATE_OFFSET_SP($k0)
         move $sp, $k0
         
@@ -227 +288 @@
         /* the $sp is automatically restored to former value */
         eret
-
-#define SS_SP      EOFFSET_SP
-#define SS_STATUS  EOFFSET_STATUS
-#define SS_EPC     EOFFSET_EPC
-#define SS_K1      EOFFSET_K1
 
 /** Syscall entry
@@ -249 +305 @@
  */
 syscall_shortcut:
-        /* we have a lot of space on the stack, with free use */
         mfc0 $t3, $epc
         mfc0 $t2, $status
-        sw $t3, SS_EPC($sp)  /* save EPC */
-        sw $k1, SS_K1($sp)   /* save $k1 not saved on context switch */
+        sw $t3, ISTATE_OFFSET_EPC($sp)  /* save EPC */
+        sw $k1, ISTATE_OFFSET_KT1($sp)  /* save $k1 not saved on context switch */
         
         and $t4, $t2, REG_SAVE_MASK  /* save only KSU, EXL, ERL, IE */
@@ -260 +315 @@
         ori $t2, $t2, 0x1  /* set IE */
         
-        sw $t4, SS_STATUS($sp)
+        sw $t4, ISTATE_OFFSET_STATUS($sp)
         mtc0 $t2, $status
         
         /*
          * Call the higher level system call handler.
-         * We are going to reuse part of the unused exception stack frame.
          *
          */
-        sw $t0, STACK_ARG4($sp)  /* save the 5th argument on the stack */
-        sw $t1, STACK_ARG5($sp)  /* save the 6th argument on the stack */
+        sw $t0, ISTATE_OFFSET_T0($sp)  /* save the 5th argument on the stack */
+        sw $t1, ISTATE_OFFSET_T1($sp)  /* save the 6th argument on the stack */
         jal syscall_handler
-        sw $v0, STACK_ARG6($sp)  /* save the syscall number on the stack */
+        sw $v0, ISTATE_OFFSET_V0($sp)  /* save the syscall number on the stack */
         
         /* restore status */
         mfc0 $t2, $status
-        lw $t3, SS_STATUS($sp)
+        lw $t3, ISTATE_OFFSET_STATUS($sp)
         
         /*
@@ -288 +342 @@
         
         /* restore epc + 4 */
-        lw $t2, SS_EPC($sp)
-        lw $k1, SS_K1($sp)
+        lw $t2, ISTATE_OFFSET_EPC($sp)
+        lw $k1, ISTATE_OFFSET_KT1($sp)
         addi $t2, $t2, 4
         mtc0 $t2, $epc
         
-        lw $sp, SS_SP($sp)  /* restore $sp */
-        eret
-
+        lw $sp, ISTATE_OFFSET_SP($sp)  /* restore $sp */
+        eret
+
+        FAKE_ABI_PROLOGUE
 tlb_refill_handler:
         KERNEL_STACK_TO_K0
-        sub $k0, REGISTER_SPACE
+        sub $k0, ISTATE_SOFT_SIZE
         REGISTERS_STORE_AND_EXC_RESET $k0
-        sw $sp,EOFFSET_SP($k0)
-        add $sp, $k0, 0
+        sw $sp, ISTATE_OFFSET_SP($k0)
+        move $sp, $k0
         
         jal tlb_refill
-        add $a0, $sp, 0 
+        move $a0, $sp 
         
         REGISTERS_LOAD $sp
         eret
 
+        FAKE_ABI_PROLOGUE
 cache_error_handler:
         KERNEL_STACK_TO_K0
-        sub $k0, REGISTER_SPACE
+        sub $k0, ISTATE_SOFT_SIZE 
         REGISTERS_STORE_AND_EXC_RESET $k0
-        sw $sp,EOFFSET_SP($k0)
-        add $sp, $k0, 0
+        sw $sp, ISTATE_OFFSET_SP($k0)
+        move $sp, $k0
         
         jal cache_error
-        add $a0, $sp, 0
+        move $a0, $sp
         
         REGISTERS_LOAD $sp
@@ -323 +379 @@
 
 userspace_asm:
-        add $sp, $a0, 0
-        add $v0, $a1, 0
-        add $t9, $a2, 0    /* set up correct entry into PIC code */
+        move $sp, $a0
+        move $v0, $a1
+        move $t9, $a2      /* set up correct entry into PIC code */
         xor $a0, $a0, $a0  /* $a0 is defined to hold pcb_ptr */
                            /* set it to 0 */

kernel/genarch/Makefile.inc

@@ -90 +90 @@
 endif
 
+ifeq ($(CONFIG_S3C24XX_IRQC),y)
+        GENARCH_SOURCES += \
+                genarch/src/drivers/s3c24xx_irqc/s3c24xx_irqc.c
+endif
+
 ifeq ($(CONFIG_S3C24XX_UART),y)
         GENARCH_SOURCES += \

kernel/genarch/include/drivers/s3c24xx_irqc/s3c24xx_irqc.h

@@ -53 +53 @@
         ioport32_t subsrcpnd;   /**< Sub source pending */
         ioport32_t intsubmsk;   /** Interrupt sub mask */
-} s3c24xx_irqc_t;
+} s3c24xx_irqc_regs_t;
 
 /** S3C24xx Interrupt source numbers.
@@ -120 +120 @@
 #define S3C24XX_SUBINT_BIT(subsource) (1 << (subsource))
 
+typedef struct {
+        s3c24xx_irqc_regs_t *regs;
+} s3c24xx_irqc_t;
+
+extern void s3c24xx_irqc_init(s3c24xx_irqc_t *, s3c24xx_irqc_regs_t *);
+extern unsigned s3c24xx_irqc_inum_get(s3c24xx_irqc_t *);
+extern void s3c24xx_irqc_clear(s3c24xx_irqc_t *, unsigned);
+extern void s3c24xx_irqc_src_enable(s3c24xx_irqc_t *, unsigned);
+extern void s3c24xx_irqc_src_disable(s3c24xx_irqc_t *, unsigned);
+extern void s3c24xx_irqc_subsrc_enable(s3c24xx_irqc_t *, unsigned);
+extern void s3c24xx_irqc_subsrc_disable(s3c24xx_irqc_t *, unsigned);
+
 #endif
 

kernel/genarch/include/drivers/s3c24xx_uart/s3c24xx_uart.h

@@ -38 +38 @@
 #define KERN_S3C24XX_UART_H_
 
+#include <ddi/irq.h>
+#include <console/chardev.h>
 #include <typedefs.h>
-#include <console/chardev.h>
 
-extern outdev_t *s3c24xx_uart_init(ioport8_t *);
+/** S3C24xx UART I/O */
+typedef struct {
+        uint32_t ulcon;
+        uint32_t ucon;
+        uint32_t ufcon;
+        uint32_t umcon;
+
+        uint32_t utrstat;
+        uint32_t uerstat;
+        uint32_t ufstat;
+        uint32_t umstat;
+
+        uint32_t utxh;
+        uint32_t urxh;
+
+        uint32_t ubrdiv;
+} s3c24xx_uart_io_t;
+
+/* Bits in UTRSTAT register */
+#define S3C24XX_UTRSTAT_TX_EMPTY        0x4
+#define S3C24XX_UTRSTAT_RDATA           0x1
+
+/* Bits in UFSTAT register */
+#define S3C24XX_UFSTAT_TX_FULL          0x4000
+#define S3C24XX_UFSTAT_RX_FULL          0x0040
+#define S3C24XX_UFSTAT_RX_COUNT         0x002f
+
+/* Bits in UCON register */
+#define UCON_RX_INT_LEVEL               0x100
+
+/* Bits in UFCON register */
+#define UFCON_TX_FIFO_TLEVEL_EMPTY      0x00
+#define UFCON_RX_FIFO_TLEVEL_1B         0x00
+#define UFCON_FIFO_ENABLE               0x01
+
+
+/** S3C24xx UART instance */
+typedef struct {
+        s3c24xx_uart_io_t *io;
+        indev_t *indev;
+        irq_t irq;
+} s3c24xx_uart_t;
+
+extern outdev_t *s3c24xx_uart_init(s3c24xx_uart_io_t *, inr_t inr);
+extern void s3c24xx_uart_input_wire(s3c24xx_uart_t *,
+    indev_t *);
 
 #endif

kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c

@@ -40 +40 @@
 #include <genarch/drivers/s3c24xx_uart/s3c24xx_uart.h>
 #include <console/chardev.h>
+#include <console/console.h>
+#include <ddi/device.h>
 #include <arch/asm.h>
 #include <mm/slab.h>
-#include <console/console.h>
 #include <sysinfo/sysinfo.h>
 #include <str.h>
 
-/** S3C24xx UART register offsets */
-#define S3C24XX_UTRSTAT         0x10
-#define S3C24XX_UTXH            0x20
-
-/* Bits in UTXH register */
-#define S3C24XX_UTXH_TX_EMPTY   0x4
-
-typedef struct {
-        ioport8_t *base;
-} s3c24xx_uart_instance_t;
-
 static void s3c24xx_uart_sendb(outdev_t *dev, uint8_t byte)
 {
-        s3c24xx_uart_instance_t *instance =
-            (s3c24xx_uart_instance_t *) dev->data;
-        ioport32_t *utrstat, *utxh;
+        s3c24xx_uart_t *uart =
+            (s3c24xx_uart_t *) dev->data;
 
-        utrstat = (ioport32_t *) (instance->base + S3C24XX_UTRSTAT);
-        utxh = (ioport32_t *) (instance->base + S3C24XX_UTXH);
-
-        /* Wait for transmitter to be empty. */
-        while ((pio_read_32(utrstat) & S3C24XX_UTXH_TX_EMPTY) == 0)
+        /* Wait for space becoming available in Tx FIFO. */
+        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0)
                 ;
 
-        pio_write_32(utxh, byte);
+        pio_write_32(&uart->io->utxh, byte);
 }
 
@@ -86 +72 @@
 }
 
+static irq_ownership_t s3c24xx_uart_claim(irq_t *irq)
+{
+        return IRQ_ACCEPT;
+}
+
+static void s3c24xx_uart_irq_handler(irq_t *irq)
+{
+        s3c24xx_uart_t *uart = irq->instance;
+
+        while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
+                uint32_t data = pio_read_32(&uart->io->urxh);
+                pio_read_32(&uart->io->uerstat);
+                indev_push_character(uart->indev, data & 0xff);
+        }
+}
+
 static outdev_operations_t s3c24xx_uart_ops = {
         .write = s3c24xx_uart_putchar,
@@ -91 +93 @@
 };
 
-outdev_t *s3c24xx_uart_init(ioport8_t *base)
+outdev_t *s3c24xx_uart_init(s3c24xx_uart_io_t *io, inr_t inr)
 {
         outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC);
@@ -97 +99 @@
                 return NULL;
 
-        s3c24xx_uart_instance_t *instance =
-            malloc(sizeof(s3c24xx_uart_instance_t), FRAME_ATOMIC);
-        if (!instance) {
+        s3c24xx_uart_t *uart =
+            malloc(sizeof(s3c24xx_uart_t), FRAME_ATOMIC);
+        if (!uart) {
                 free(uart_dev);
                 return NULL;
@@ -105 +107 @@
 
         outdev_initialize("s3c24xx_uart_dev", uart_dev, &s3c24xx_uart_ops);
-        uart_dev->data = instance;
+        uart_dev->data = uart;
 
-        instance->base = base;
+        uart->io = io;
+        uart->indev = NULL;
+
+        /* Initialize IRQ structure. */
+        irq_initialize(&uart->irq);
+        uart->irq.devno = device_assign_devno();
+        uart->irq.inr = inr;
+        uart->irq.claim = s3c24xx_uart_claim;
+        uart->irq.handler = s3c24xx_uart_irq_handler;
+        uart->irq.instance = uart;
+
+        /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
+        pio_write_32(&uart->io->ufcon, UFCON_FIFO_ENABLE |
+            UFCON_TX_FIFO_TLEVEL_EMPTY | UFCON_RX_FIFO_TLEVEL_1B);
+
+        /* Set RX interrupt to pulse mode */
+        pio_write_32(&uart->io->ucon,
+            pio_read_32(&uart->io->ucon) & ~UCON_RX_INT_LEVEL);
 
         if (!fb_exported) {
@@ -116 +135 @@
                 sysinfo_set_item_val("fb", NULL, true);
                 sysinfo_set_item_val("fb.kind", NULL, 3);
-                sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(base));
+                sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(io));
 
                 fb_exported = true;
@@ -124 +143 @@
 }
 
+void s3c24xx_uart_input_wire(s3c24xx_uart_t *uart, indev_t *indev)
+{
+        ASSERT(uart);
+        ASSERT(indev);
+
+        uart->indev = indev;
+        irq_register(&uart->irq);
+}
+
 /** @}
  */

kernel/generic/include/ddi/ddi.h

@@ -54 +54 @@
 extern unative_t sys_physmem_map(unative_t, unative_t, unative_t, unative_t);
 extern unative_t sys_iospace_enable(ddi_ioarg_t *);
-extern unative_t sys_preempt_control(int);
 
 /*

kernel/generic/include/security/cap.h

@@ -70 +70 @@
 
 /**
- * CAP_PREEMPT_CONTROL allows its holder to disable/enable preemption.
- */
-#define CAP_PREEMPT_CONTROL     (1<<3)
-
-/**
  * CAP_IRQ_REG entitles its holder to register IRQ handlers.
  */
-#define CAP_IRQ_REG             (1<<4) 
+#define CAP_IRQ_REG             (1<<3) 
 
 typedef uint32_t cap_t;

kernel/generic/include/syscall/syscall.h

@@ -80 +80 @@
         SYS_PHYSMEM_MAP,
         SYS_IOSPACE_ENABLE,
-        SYS_PREEMPT_CONTROL,
         
         SYS_SYSINFO_GET_TAG,

kernel/generic/src/ddi/ddi.c

@@ -258 +258 @@
 }
 
-/** Disable or enable preemption.
- *
- * @param enable If non-zero, the preemption counter will be decremented,
- *               leading to potential enabling of preemption. Otherwise
- *               the preemption counter will be incremented, preventing
- *               preemption from occurring.
- *
- * @return Zero on success or EPERM if callers capabilities are not sufficient.
- *
- */
-unative_t sys_preempt_control(int enable)
-{
-        if (!(cap_get(TASK) & CAP_PREEMPT_CONTROL))
-                return EPERM;
-        
-        if (enable)
-                preemption_enable();
-        else
-                preemption_disable();
-        
-        return 0;
-}
-
 /** @}
  */

kernel/generic/src/main/kinit.c

@@ -208 +208 @@
                          */
                         cap_set(programs[i].task, CAP_CAP | CAP_MEM_MANAGER |
-                            CAP_IO_MANAGER | CAP_PREEMPT_CONTROL | CAP_IRQ_REG);
+                            CAP_IO_MANAGER | CAP_IRQ_REG);
                         
                         if (!ipc_phone_0)

kernel/generic/src/mm/frame.c

@@ -161 +161 @@
         for (j = zones.count; j > i; j--) {
                 zones.info[j] = zones.info[j - 1];
-                zones.info[j].buddy_system->data =
-                    (void *) &zones.info[j - 1];
+                if (zones.info[j].buddy_system != NULL)
+                        zones.info[j].buddy_system->data =
+                            (void *) &zones.info[j];
         }
         
@@ -762 +763 @@
         for (i = z2 + 1; i < zones.count; i++) {
                 zones.info[i - 1] = zones.info[i];
-                zones.info[i - 1].buddy_system->data =
-                    (void *) &zones.info[i - 1];
+                if (zones.info[i - 1].buddy_system != NULL)
+                        zones.info[i - 1].buddy_system->data =
+                            (void *) &zones.info[i - 1];
         }
         

kernel/generic/src/syscall/syscall.c

@@ -159 +159 @@
         (syshandler_t) sys_physmem_map,
         (syshandler_t) sys_iospace_enable,
-        (syshandler_t) sys_preempt_control,
         
         /* Sysinfo syscalls */