Index: kernel/arch/amd64/include/asm.h
===================================================================
--- kernel/arch/amd64/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/amd64/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -74,5 +74,5 @@
  * @return Value read
  */
-static inline uint8_t inb(uint16_t port)
+static inline uint8_t pio_read_8(uint16_t port)
 {
 	uint8_t val;
@@ -89,5 +89,5 @@
  * @param val Value to write
  */
-static inline void outb(uint16_t port, uint8_t val)
+static inline void pio_write_8(uint16_t port, uint8_t val)
 {
 	asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port));
Index: kernel/arch/arm32/include/asm.h
===================================================================
--- kernel/arch/arm32/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/arm32/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -47,13 +47,12 @@
 }
 
-/** No I/O port address space on ARM. */
-static inline void outb(ioport_t port, uint8_t v)
+static inline void pio_write_8(ioport_t port, uint8_t v)
 {
+	/* XXX */
 }
 
-/** No I/O port address space on ARM. */
-static inline uint8_t inb(ioport_t port)
+static inline uint8_t pio_read_8(ioport_t port)
 {
-	return 0;
+	return 0;	/* XXX */
 }
 
Index: kernel/arch/ia32/include/asm.h
===================================================================
--- kernel/arch/ia32/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia32/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -106,5 +106,5 @@
  * @param val Value to write
  */
-static inline void outb(uint16_t port, uint8_t val)
+static inline void pio_write_8(uint16_t port, uint8_t val)
 {
 	asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) );
@@ -118,5 +118,5 @@
  * @param val Value to write
  */
-static inline void outw(uint16_t port, uint16_t val)
+static inline void pio_write_16(uint16_t port, uint16_t val)
 {
 	asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) );
@@ -130,5 +130,5 @@
  * @param val Value to write
  */
-static inline void outl(uint16_t port, uint32_t val)
+static inline void pio_write_32(uint16_t port, uint32_t val)
 {
 	asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) );
@@ -142,5 +142,5 @@
  * @return Value read
  */
-static inline uint8_t inb(uint16_t port)
+static inline uint8_t pio_read_8(uint16_t port)
 {
 	uint8_t val;
@@ -157,5 +157,5 @@
  * @return Value read
  */
-static inline uint16_t inw(uint16_t port)
+static inline uint16_t pio_read_16(uint16_t port)
 {
 	uint16_t val;
@@ -172,5 +172,5 @@
  * @return Value read
  */
-static inline uint32_t inl(uint16_t port)
+static inline uint32_t pio_read_32(uint16_t port)
 {
 	uint32_t val;
Index: kernel/arch/ia32/include/drivers/i8042.h
===================================================================
--- kernel/arch/ia32/include/drivers/i8042.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia32/include/drivers/i8042.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -48,20 +48,20 @@
 static inline void i8042_data_write(uint8_t data)
 {
-	outb(i8042_DATA, data);
+	pio_write_8(i8042_DATA, data);
 }
 
 static inline uint8_t i8042_data_read(void)
 {
-	return inb(i8042_DATA);
+	return pio_read_8(i8042_DATA);
 }
 
 static inline uint8_t i8042_status_read(void)
 {
-	return inb(i8042_STATUS);
+	return pio_read_8(i8042_STATUS);
 }
 
 static inline void i8042_command_write(uint8_t command)
 {
-	outb(i8042_STATUS, command);
+	pio_write_8(i8042_STATUS, command);
 }
 
Index: kernel/arch/ia32/src/drivers/i8254.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8254.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia32/src/drivers/i8254.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -95,8 +95,8 @@
 void i8254_normal_operation(void)
 {
-	outb(CLK_PORT4, 0x36);
+	pio_write_8(CLK_PORT4, 0x36);
 	pic_disable_irqs(1 << IRQ_CLK);
-	outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
-	outb(CLK_PORT1, (CLK_CONST / HZ) >> 8);
+	pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
+	pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8);
 	pic_enable_irqs(1 << IRQ_CLK);
 }
@@ -115,34 +115,34 @@
 	 * MAGIC_NUMBER is the magic value for 1ms.
 	 */
-	outb(CLK_PORT4, 0x30);
-	outb(CLK_PORT1, 0xff);
-	outb(CLK_PORT1, 0xff);
+	pio_write_8(CLK_PORT4, 0x30);
+	pio_write_8(CLK_PORT1, 0xff);
+	pio_write_8(CLK_PORT1, 0xff);
 
 	do {
 		/* will read both status and count */
-		outb(CLK_PORT4, 0xc2);
-		not_ok = (uint8_t) ((inb(CLK_PORT1) >> 6) & 1);
-		t1 = inb(CLK_PORT1);
-		t1 |= inb(CLK_PORT1) << 8;
+		pio_write_8(CLK_PORT4, 0xc2);
+		not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1);
+		t1 = pio_read_8(CLK_PORT1);
+		t1 |= pio_read_8(CLK_PORT1) << 8;
 	} while (not_ok);
 
 	asm_delay_loop(LOOPS);
 
-	outb(CLK_PORT4, 0xd2);
-	t2 = inb(CLK_PORT1);
-	t2 |= inb(CLK_PORT1) << 8;
+	pio_write_8(CLK_PORT4, 0xd2);
+	t2 = pio_read_8(CLK_PORT1);
+	t2 |= pio_read_8(CLK_PORT1) << 8;
 
 	/*
 	 * We want to determine the overhead of the calibrating mechanism.
 	 */
-	outb(CLK_PORT4, 0xd2);
-	o1 = inb(CLK_PORT1);
-	o1 |= inb(CLK_PORT1) << 8;
+	pio_write_8(CLK_PORT4, 0xd2);
+	o1 = pio_read_8(CLK_PORT1);
+	o1 |= pio_read_8(CLK_PORT1) << 8;
 
 	asm_fake_loop(LOOPS);
 
-	outb(CLK_PORT4, 0xd2);
-	o2 = inb(CLK_PORT1);
-	o2 |= inb(CLK_PORT1) << 8;
+	pio_write_8(CLK_PORT4, 0xd2);
+	o2 = pio_read_8(CLK_PORT1);
+	o2 |= pio_read_8(CLK_PORT1) << 8;
 
 	CPU->delay_loop_const =
Index: kernel/arch/ia32/src/drivers/i8259.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8259.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia32/src/drivers/i8259.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -50,26 +50,26 @@
 {
 	/* ICW1: this is ICW1, ICW4 to follow */
-	outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
+	pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
 	/* ICW2: IRQ 0 maps to INT IRQBASE */
-	outb(PIC_PIC0PORT2, IVT_IRQBASE);
+	pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
 
 	/* ICW3: pic1 using IRQ IRQ_PIC1 */
-	outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
+	pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
 
 	/* ICW4: i8086 mode */
-	outb(PIC_PIC0PORT2, 1);
+	pio_write_8(PIC_PIC0PORT2, 1);
 
 	/* ICW1: ICW1, ICW4 to follow */
-	outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
+	pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
 	/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
-	outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
+	pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
 
 	/* ICW3: pic1 is known as IRQ_PIC1 */
-	outb(PIC_PIC1PORT2, IRQ_PIC1);
+	pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
 
 	/* ICW4: i8086 mode */
-	outb(PIC_PIC1PORT2, 1);
+	pio_write_8(PIC_PIC1PORT2, 1);
 
 	/*
@@ -95,10 +95,10 @@
 
 	if (irqmask & 0xff) {
-		x = inb(PIC_PIC0PORT2);
-		outb(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
+		x = pio_read_8(PIC_PIC0PORT2);
+		pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
 	}
 	if (irqmask >> 8) {
-		x = inb(PIC_PIC1PORT2);
-		outb(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
+		x = pio_read_8(PIC_PIC1PORT2);
+		pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
 	}
 }
@@ -109,10 +109,10 @@
 
 	if (irqmask & 0xff) {
-		x = inb(PIC_PIC0PORT2);
-		outb(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
+		x = pio_read_8(PIC_PIC0PORT2);
+		pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
 	}
 	if (irqmask >> 8) {
-		x = inb(PIC_PIC1PORT2);
-		outb(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
+		x = pio_read_8(PIC_PIC1PORT2);
+		pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
 	}
 }
@@ -120,6 +120,6 @@
 void pic_eoi(void)
 {
-	outb(0x20, 0x20);
-	outb(0xa0, 0x20);
+	pio_write_8(0x20, 0x20);
+	pio_write_8(0xa0, 0x20);
 }
 
Index: kernel/arch/ia32/src/smp/smp.c
===================================================================
--- kernel/arch/ia32/src/smp/smp.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia32/src/smp/smp.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -123,6 +123,6 @@
 	 * BIOS will not do the POST after the INIT signal.
 	 */
-	outb(0x70, 0xf);
-	outb(0x71, 0xa);
+	pio_write_8(0x70, 0xf);
+	pio_write_8(0x71, 0xa);
 
 	pic_disable_irqs(0xffff);
Index: kernel/arch/ia64/include/asm.h
===================================================================
--- kernel/arch/ia64/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia64/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -42,5 +42,5 @@
 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
 
-static inline void outb(ioport_t port, uint8_t v)
+static inline void pio_write_8(ioport_t port, uint8_t v)
 {
 	*((uint8_t *)(IA64_IOSPACE_ADDRESS +
@@ -50,5 +50,5 @@
 }
 
-static inline void outw(ioport_t port, uint16_t v)
+static inline void pio_write_16(ioport_t port, uint16_t v)
 {
 	*((uint16_t *)(IA64_IOSPACE_ADDRESS +
@@ -58,5 +58,5 @@
 }
 
-static inline void outl(ioport_t port, uint32_t v)
+static inline void pio_write_32(ioport_t port, uint32_t v)
 {
 	*((uint32_t *)(IA64_IOSPACE_ADDRESS +
@@ -66,5 +66,5 @@
 }
 
-static inline uint8_t inb(ioport_t port)
+static inline uint8_t pio_read_8(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
@@ -74,5 +74,5 @@
 }
 
-static inline uint16_t inw(ioport_t port)
+static inline uint16_t pio_read_16(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
@@ -82,5 +82,5 @@
 }
 
-static inline uint32_t inl(ioport_t port)
+static inline uint32_t pio_read_32(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
Index: kernel/arch/ia64/include/drivers/i8042.h
===================================================================
--- kernel/arch/ia64/include/drivers/i8042.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia64/include/drivers/i8042.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -48,20 +48,20 @@
 static inline void i8042_data_write(uint8_t data)
 {
-	outb(i8042_DATA, data);
+	pio_write_8(i8042_DATA, data);
 }
 
 static inline uint8_t i8042_data_read(void)
 {
-	return inb(i8042_DATA);
+	return pio_read_8(i8042_DATA);
 }
 
 static inline uint8_t i8042_status_read(void)
 {
-	return inb(i8042_STATUS);
+	return pio_read_8(i8042_STATUS);
 }
 
 static inline void i8042_command_write(uint8_t command)
 {
-	outb(i8042_STATUS, command);
+	pio_write_8(i8042_STATUS, command);
 }
 
Index: kernel/arch/ia64/src/ia64.c
===================================================================
--- kernel/arch/ia64/src/ia64.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ia64/src/ia64.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -250,5 +250,5 @@
 void arch_reboot(void)
 {
-	outb(0x64, 0xfe);
+	pio_write_8(0x64, 0xfe);
 	while (1)
 		;
Index: kernel/arch/mips32/include/asm.h
===================================================================
--- kernel/arch/mips32/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/mips32/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -71,13 +71,12 @@
 extern ipl_t interrupts_read(void);
 
-/** No I/O port address space on MIPS. */
-static inline void outb(ioport_t port, uint8_t v)
+static inline void pio_write_8(ioport_t port, uint8_t v)
 {
+	/* XXX */
 }
 
-/** No I/O port address space on MIPS. */
-static inline uint8_t inb(ioport_t port)
+static inline uint8_t pio_read_8(ioport_t port)
 {
-	return 0;
+	return 0;	/* XXX */
 }
 
Index: kernel/arch/ppc32/include/asm.h
===================================================================
--- kernel/arch/ppc32/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/ppc32/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -150,13 +150,12 @@
 extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
 
-/** No I/O port address space on PowerPC. */
-static inline void outb(ioport_t port, uint8_t v)
+static inline void pio_write_8(ioport_t port, uint8_t v)
 {
+	/* XXX */
 }
 
-/** No I/O port address space on PowerPC. */
-static inline uint8_t inb(ioport_t port)
+static inline uint8_t pio_read_8(ioport_t port)
 {
-	return 0;
+	return 0;	/* XXX */
 }
 
Index: kernel/arch/sparc64/include/asm.h
===================================================================
--- kernel/arch/sparc64/include/asm.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/arch/sparc64/include/asm.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -45,5 +45,5 @@
 #include <arch/barrier.h>
 
-static inline void outb(ioport_t port, uint8_t v)
+static inline void pio_write_8(ioport_t port, uint8_t v)
 {
 	*((volatile uint8_t *)(port)) = v;
@@ -51,5 +51,5 @@
 }
 
-static inline void outw(ioport_t port, uint16_t v)
+static inline void pio_write_16(ioport_t port, uint16_t v)
 {
 	*((volatile uint16_t *)(port)) = v;
@@ -57,5 +57,5 @@
 }
 
-static inline void outl(ioport_t port, uint32_t v)
+static inline void pio_write_32(ioport_t port, uint32_t v)
 {
 	*((volatile uint32_t *)(port)) = v;
@@ -63,5 +63,5 @@
 }
 
-static inline uint8_t inb(ioport_t port)
+static inline uint8_t pio_read_8(ioport_t port)
 {
 	uint8_t rv;
@@ -73,5 +73,5 @@
 }
 
-static inline uint16_t inw(ioport_t port)
+static inline uint16_t pio_read_16(ioport_t port)
 {
 	uint16_t rv;
@@ -83,5 +83,5 @@
 }
 
-static inline uint32_t inl(ioport_t port)
+static inline uint32_t pio_read_32(ioport_t port)
 {
 	uint32_t rv;
Index: kernel/genarch/include/kbd/ns16550.h
===================================================================
--- kernel/genarch/include/kbd/ns16550.h	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/genarch/include/kbd/ns16550.h	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -78,54 +78,54 @@
 static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + RBR_REG);
+	return pio_read_8(dev->io_port + RBR_REG);
 }
 static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v)
 {
-	outb(dev->io_port + RBR_REG, v);
+	pio_write_8(dev->io_port + RBR_REG, v);
 }
 
 static inline uint8_t ns16550_ier_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + IER_REG);
+	return pio_read_8(dev->io_port + IER_REG);
 }
 
 static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
 {
-	outb(dev->io_port + IER_REG, v);
+	pio_write_8(dev->io_port + IER_REG, v);
 }
 
 static inline uint8_t ns16550_iir_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + IIR_REG);
+	return pio_read_8(dev->io_port + IIR_REG);
 }
 
 static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
 {
-	outb(dev->io_port + FCR_REG, v);
+	pio_write_8(dev->io_port + FCR_REG, v);
 }
 
 static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + LCR_REG);
+	return pio_read_8(dev->io_port + LCR_REG);
 }
 
 static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
 {
-	outb(dev->io_port + LCR_REG, v);
+	pio_write_8(dev->io_port + LCR_REG, v);
 }
 
 static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + LSR_REG);
+	return pio_read_8(dev->io_port + LSR_REG);
 }
 
 static inline uint8_t ns16550_mcr_read(ns16550_t *dev)
 {
-	return inb(dev->io_port + MCR_REG);
+	return pio_read_8(dev->io_port + MCR_REG);
 }
 
 static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v)
 {
-	outb(dev->io_port + MCR_REG, v);
+	pio_write_8(dev->io_port + MCR_REG, v);
 }
 
Index: kernel/genarch/src/drivers/ega/ega.c
===================================================================
--- kernel/genarch/src/drivers/ega/ega.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/genarch/src/drivers/ega/ega.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -84,8 +84,8 @@
 static void ega_move_cursor(void)
 {
-	outb(ega_base + EGA_INDEX_REG, 0xe);
-	outb(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
-	outb(ega_base + EGA_INDEX_REG, 0xf);
-	outb(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));	
+	pio_write_8(ega_base + EGA_INDEX_REG, 0xe);
+	pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
+	pio_write_8(ega_base + EGA_INDEX_REG, 0xf);
+	pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));	
 }
 
Index: kernel/generic/src/ipc/irq.c
===================================================================
--- kernel/generic/src/ipc/irq.c	(revision e7f2ad68c3081b85a41032d60746f0b30111d468)
+++ kernel/generic/src/ipc/irq.c	(revision ee06f2a049baaea0e4c9fc693e7c3c34f3105202)
@@ -102,8 +102,8 @@
 			break;
 		case CMD_PORT_READ_1:
-			dstval = inb((long) code->cmds[i].addr);
+			dstval = pio_read_8((long) code->cmds[i].addr);
 			break;
 		case CMD_PORT_WRITE_1:
-			outb((long) code->cmds[i].addr, code->cmds[i].value);
+			pio_write_8((long) code->cmds[i].addr, code->cmds[i].value);
 			break;
 		default:
