Index: kernel/arch/mips32/include/mm/page.h
===================================================================
--- kernel/arch/mips32/include/mm/page.h	(revision da1bafb8cf9a3b3be8ef21bc114daaa476a85190)
+++ kernel/arch/mips32/include/mm/page.h	(revision ed7998b74c53c523bc17491e703fc2c4dd6651fd)
@@ -37,4 +37,5 @@
 
 #include <arch/mm/frame.h>
+#include <trace.h>
 
 #define PAGE_WIDTH	FRAME_WIDTH
@@ -155,5 +156,5 @@
 
 
-static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
+NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
 {
 	pte_t *p = &pt[i];
@@ -168,5 +169,5 @@
 }
 
-static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
+NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
 {
 	pte_t *p = &pt[i];
Index: kernel/arch/mips32/include/mm/tlb.h
===================================================================
--- kernel/arch/mips32/include/mm/tlb.h	(revision da1bafb8cf9a3b3be8ef21bc114daaa476a85190)
+++ kernel/arch/mips32/include/mm/tlb.h	(revision ed7998b74c53c523bc17491e703fc2c4dd6651fd)
@@ -39,4 +39,5 @@
 #include <arch/mm/asid.h>
 #include <arch/exception.h>
+#include <trace.h>
 
 #define TLB_ENTRY_COUNT  48
@@ -126,5 +127,5 @@
  * Probe TLB for Matching Entry.
  */
-static inline void tlbp(void)
+NO_TRACE static inline void tlbp(void)
 {
 	asm volatile ("tlbp\n\t");
@@ -136,5 +137,5 @@
  * Read Indexed TLB Entry.
  */
-static inline void tlbr(void)
+NO_TRACE static inline void tlbr(void)
 {
 	asm volatile ("tlbr\n\t");
@@ -145,5 +146,5 @@
  * Write Indexed TLB Entry.
  */
-static inline void tlbwi(void)
+NO_TRACE static inline void tlbwi(void)
 {
 	asm volatile ("tlbwi\n\t");
@@ -154,5 +155,5 @@
  * Write Random TLB Entry.
  */
-static inline void tlbwr(void)
+NO_TRACE static inline void tlbwr(void)
 {
 	asm volatile ("tlbwr\n\t");