Changeset ebf6a40 in mainline for uspace/drv/ehci-hcd/pci.c
- Timestamp:
- 2011-05-08T19:12:58Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9212f8a
- Parents:
- 7b6f116 (diff), 511cfc8 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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uspace/drv/ehci-hcd/pci.c
r7b6f116 rebf6a40 54 54 55 55 #define CMD_OFFSET 0x0 56 #define CONFIGFLAG_OFFSET 0x40 56 #define STS_OFFSET 0x4 57 #define CFG_OFFSET 0x40 57 58 58 59 #define USBCMD_RUN 1 … … 264 265 * It would prevent pre-OS code from interfering. */ 265 266 ret = async_req_3_0(parent_phone, DEV_IFACE_ID(PCI_DEV_IFACE), 266 IPC_M_CONFIG_SPACE_WRITE_32, eecp + USBLEGCTLSTS_OFFSET, 0); 267 IPC_M_CONFIG_SPACE_WRITE_32, eecp + USBLEGCTLSTS_OFFSET, 268 0xe0000000); 267 269 CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) zero USBLEGCTLSTS.\n", ret); 268 usb_log_debug("Zeroed USBLEGCTLSTS register.\n");269 270 270 271 /* Read again Legacy Support and Control register */ … … 291 292 volatile uint32_t *usbcmd = 292 293 (uint32_t*)((uint8_t*)registers + operation_offset + CMD_OFFSET); 294 volatile uint32_t *usbsts = 295 (uint32_t*)((uint8_t*)registers + operation_offset + STS_OFFSET); 293 296 volatile uint32_t *usbconfigured = 294 (uint32_t*)((uint8_t*)registers + operation_offset 295 + CONFIGFLAG_OFFSET); 297 (uint32_t*)((uint8_t*)registers + operation_offset + CFG_OFFSET); 296 298 usb_log_debug("USBCMD value: %x.\n", *usbcmd); 297 299 if (*usbcmd & USBCMD_RUN) { 298 300 *usbcmd = 0; 301 while (!(*usbsts & (1 << 12))); /*wait until hc is halted */ 299 302 *usbconfigured = 0; 300 303 usb_log_info("EHCI turned off.\n"); … … 302 305 usb_log_info("EHCI was not running.\n"); 303 306 } 307 usb_log_debug("Registers: %x(0x00080000):%x(0x00001000):%x(0x0).\n", 308 *usbcmd, *usbsts, *usbconfigured); 304 309 305 310 async_hangup(parent_phone);
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