Changeset ebf6a40 in mainline
- Timestamp:
- 2011-05-08T19:12:58Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9212f8a
- Parents:
- 7b6f116 (diff), 511cfc8 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- uspace/drv
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/ehci-hcd/pci.c
r7b6f116 rebf6a40 54 54 55 55 #define CMD_OFFSET 0x0 56 #define CONFIGFLAG_OFFSET 0x40 56 #define STS_OFFSET 0x4 57 #define CFG_OFFSET 0x40 57 58 58 59 #define USBCMD_RUN 1 … … 264 265 * It would prevent pre-OS code from interfering. */ 265 266 ret = async_req_3_0(parent_phone, DEV_IFACE_ID(PCI_DEV_IFACE), 266 IPC_M_CONFIG_SPACE_WRITE_32, eecp + USBLEGCTLSTS_OFFSET, 0); 267 IPC_M_CONFIG_SPACE_WRITE_32, eecp + USBLEGCTLSTS_OFFSET, 268 0xe0000000); 267 269 CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) zero USBLEGCTLSTS.\n", ret); 268 usb_log_debug("Zeroed USBLEGCTLSTS register.\n");269 270 270 271 /* Read again Legacy Support and Control register */ … … 291 292 volatile uint32_t *usbcmd = 292 293 (uint32_t*)((uint8_t*)registers + operation_offset + CMD_OFFSET); 294 volatile uint32_t *usbsts = 295 (uint32_t*)((uint8_t*)registers + operation_offset + STS_OFFSET); 293 296 volatile uint32_t *usbconfigured = 294 (uint32_t*)((uint8_t*)registers + operation_offset 295 + CONFIGFLAG_OFFSET); 297 (uint32_t*)((uint8_t*)registers + operation_offset + CFG_OFFSET); 296 298 usb_log_debug("USBCMD value: %x.\n", *usbcmd); 297 299 if (*usbcmd & USBCMD_RUN) { 298 300 *usbcmd = 0; 301 while (!(*usbsts & (1 << 12))); /*wait until hc is halted */ 299 302 *usbconfigured = 0; 300 303 usb_log_info("EHCI turned off.\n"); … … 302 305 usb_log_info("EHCI was not running.\n"); 303 306 } 307 usb_log_debug("Registers: %x(0x00080000):%x(0x00001000):%x(0x0).\n", 308 *usbcmd, *usbsts, *usbconfigured); 304 309 305 310 async_hangup(parent_phone); -
uspace/drv/uhci-rhd/port.c
r7b6f116 rebf6a40 32 32 * @brief UHCI root hub port routines 33 33 */ 34 #include <libarch/ddi.h> /* pio_read and pio_write */ 34 #include <libarch/ddi.h> /* pio_read and pio_write */ 35 #include <fibril_synch.h> /* async_usleep */ 35 36 #include <errno.h> 36 37 #include <str_error.h> 37 #include <fibril_synch.h>38 38 39 39 #include <usb/usb.h> /* usb_address_t */ 40 #include <usb/hub.h> 40 #include <usb/hub.h> /* usb_hc_new_device_wrapper */ 41 41 #include <usb/debug.h> 42 42 … … 212 212 213 213 /* 214 * The host then waits for at least 100 ms to allow completion of 215 * an insertion process and for power at the device to become stable. 216 */ 217 async_usleep(100000); 218 219 /* 220 * Resets from root ports should be nominally 50ms 214 * Resets from root ports should be nominally 50ms (USB spec 7.1.7.3) 221 215 */ 222 216 { … … 229 223 port_status &= ~STATUS_IN_RESET; 230 224 uhci_port_write_status(port, port_status); 231 usb_log_debug("%s: Reset Signal stop.\n", port->id_string);232 }233 234 /* the reset recovery time 10ms */235 async_usleep(10000);236 225 while (uhci_port_read_status(port) & STATUS_IN_RESET); 226 // TODO: find a better way to waste time (it should be less than 227 // 10ms, if we reschedule it takes too much time (random 228 // interrupts can be solved by multiple attempts). 229 usb_log_debug2("%s: Reset Signal stop.\n", port->id_string); 230 } 237 231 /* Enable the port. */ 238 232 uhci_port_set_enabled(port, true); 233 234 /* Reset recovery period, 235 * devices do not have to respond during this period 236 */ 237 async_usleep(10000); 239 238 return EOK; 240 239 } … … 255 254 usb_log_debug("%s: Detected new device.\n", port->id_string); 256 255 256 int ret, count = 0; 257 257 usb_address_t dev_addr; 258 int ret = usb_hc_new_device_wrapper(port->rh, &port->hc_connection, 259 speed, uhci_port_reset_enable, port->number, port, 260 &dev_addr, &port->attached_device, NULL, NULL, NULL); 258 do { 259 ret = usb_hc_new_device_wrapper(port->rh, &port->hc_connection, 260 speed, uhci_port_reset_enable, port->number, port, 261 &dev_addr, &port->attached_device, NULL, NULL, NULL); 262 } while (ret != EOK && ++count < 4); 261 263 262 264 if (ret != EOK) { … … 313 315 /* Wait for port to become enabled */ 314 316 do { 315 async_usleep(1000);316 317 port_status = uhci_port_read_status(port); 317 318 } while ((port_status & STATUS_CONNECTED) &&
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