Changeset eb3683a in mainline for uspace/drv/block/ahci/ahci_hw.h
- Timestamp:
- 2012-07-21T14:11:55Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 76c07e4
- Parents:
- 8486c07
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/block/ahci/ahci_hw.h
r8486c07 reb3683a 374 374 } ahci_ghc_ghc_t; 375 375 376 /** AHCI GHC register offset. */377 #define AHCI_GHC_GHC_REGISTER_OFFSET 1378 379 376 /** AHCI Enable mask bit. */ 380 377 #define AHCI_GHC_GHC_AE 0x80000000 … … 384 381 385 382 /** AHCI Memory register Interrupt pending register. */ 386 typedef struct { 387 /** Interrupt pending status, if set, indicates that 388 * the corresponding port has an interrupt pending. 389 */ 390 uint32_t u32; 391 } ahci_ghc_is_t; 383 typedef uint32_t ahci_ghc_is_t; 392 384 393 385 /** AHCI GHC register offset. */ 394 #define AHCI_GHC_IS_REGISTER_OFFSET 2 386 #define AHCI_GHC_IS_REGISTER_OFFSET 2 387 388 /** AHCI ports registers offset. */ 389 #define AHCI_PORTS_REGISTERS_OFFSET 64 390 391 /** AHCI port registers size. */ 392 #define AHCI_PORT_REGISTERS_SIZE 32 393 394 /** AHCI port IS register offset. */ 395 #define AHCI_PORT_IS_REGISTER_OFFSET 4 395 396 396 397 /** AHCI Memory register Ports implemented. */ … … 531 532 uint32_t ghc; 532 533 /** Interrupt Status */ 533 uint32_t is;534 ahci_ghc_is_t is; 534 535 /** Ports Implemented */ 535 536 uint32_t pi; … … 603 604 604 605 /** AHCI Memory register Port x Interrupt Status. */ 605 typedef union { 606 struct { 607 /** Device to Host Register FIS Interrupt. */ 608 unsigned int dhrs : 1; 609 /** PIO Setup FIS Interrupt. */ 610 unsigned int pss : 1; 611 /** DMA Setup FIS Interrupt. */ 612 unsigned int dss : 1; 613 /** Set Device Bits Interrupt. */ 614 unsigned int sdbs : 1; 615 /** Unknown FIS Interrupt. */ 616 unsigned int ufs : 1; 617 /** Descriptor Processed. */ 618 unsigned int dps : 1; 619 /** Port Connect Change Status. */ 620 unsigned int pcs : 1; 621 /** Device Mechanical Presence Status. */ 622 unsigned int dmps : 1; 623 /** Reserved. */ 624 unsigned int reserved1 : 14; 625 /** PhyRdy Change Status. */ 626 unsigned int prcs : 1; 627 /** Incorrect Port Multiplier Status. */ 628 unsigned int ipms : 1; 629 /** Overflow Status. */ 630 unsigned int ofs : 1; 631 /** Reserved. */ 632 unsigned int reserved2 : 1; 633 /** Interface Non-fatal Error Status. */ 634 unsigned int infs : 1; 635 /** Interface Fatal Error Status. */ 636 unsigned int ifs : 1; 637 /** Host Bus Data Error Status. */ 638 unsigned int hbds : 1; 639 /** Host Bus Fatal Error Status. */ 640 unsigned int hbfs : 1; 641 /** Task File Error Status. */ 642 unsigned int tfes : 1; 643 /** Cold Port Detect Status. */ 644 unsigned int cpds : 1; 645 }; 646 uint32_t u32; 647 } ahci_port_is_t; 606 typedef uint32_t ahci_port_is_t; 648 607 649 608 #define AHCI_PORT_IS_DHRS (1 << 0) … … 700 659 static inline int ahci_port_is_end_of_operation(ahci_port_is_t port_is) 701 660 { 702 return port_is .u32& AHCI_PORT_END_OF_OPERATION;661 return port_is & AHCI_PORT_END_OF_OPERATION; 703 662 } 704 663 … … 712 671 static inline int ahci_port_is_error(ahci_port_is_t port_is) 713 672 { 714 return port_is .u32& AHCI_PORT_IS_ERROR;673 return port_is & AHCI_PORT_IS_ERROR; 715 674 } 716 675 … … 724 683 static inline int ahci_port_is_permanent_error(ahci_port_is_t port_is) 725 684 { 726 return port_is .u32& AHCI_PORT_IS_PERMANENT_ERROR;685 return port_is & AHCI_PORT_IS_PERMANENT_ERROR; 727 686 } 728 687 … … 736 695 static inline int ahci_port_is_tfes(ahci_port_is_t port_is) 737 696 { 738 return port_is .u32& AHCI_PORT_IS_TFES;697 return port_is & AHCI_PORT_IS_TFES; 739 698 } 740 699 … … 994 953 uint32_t pxfbu; 995 954 /** Port x Interrupt Status. */ 996 uint32_t pxis;955 ahci_port_is_t pxis; 997 956 /** Port x Interrupt Enable. */ 998 957 uint32_t pxie; … … 1030 989 ahci_ghc_t ghc; 1031 990 /** Reserved. */ 1032 uint32_t reserved[13]; 991 uint32_t reserved[13]; 1033 992 /** Reserved for NVMHCI. */ 1034 993 uint32_t reservedfornvmhci[16]; … … 1036 995 uint32_t vendorspecificsregs[24]; 1037 996 /** Ports. */ 1038 ahci_port_t ports[ 32];997 ahci_port_t ports[AHCI_MAX_PORTS]; 1039 998 } ahci_memregs_t; 1040 999
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