Index: uspace/drv/bus/usb/xhci/commands.c
===================================================================
--- uspace/drv/bus/usb/xhci/commands.c	(revision 0577066660ce1e30ed4d91fc1335280501a120db)
+++ uspace/drv/bus/usb/xhci/commands.c	(revision e7f21884042a1982eca8bad23a6e3328530c1d9a)
@@ -43,5 +43,5 @@
 #include "hw_struct/trb.h"
 
-#define TRB_SET_TCS(trb, tcs)   (trb).control |= host2xhci(32, ((tcs &0x1) << 9))
+#define TRB_SET_TSP(trb, tsp)   (trb).control |= host2xhci(32, (((tsp) & 0x1) << 9))
 #define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
 #define TRB_SET_DC(trb, dc)     (trb).control |= host2xhci(32, (dc) << 9)
@@ -51,8 +51,4 @@
 #define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
 #define TRB_SET_DEV_SPEED(trb, speed)	(trb).control |= host2xhci(32, (speed & 0xF) << 16)
-
-/**
- * TODO: Not sure about SCT and DCS (see section 6.4.3.9).
- */
 #define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
 #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF))
@@ -512,12 +508,8 @@
 	assert(cmd);
 
-	/**
-	 * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
-	 *       information about this flag.
-	 */
 	xhci_trb_clean(&cmd->_header.trb);
 
 	TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
-	TRB_SET_TCS(cmd->_header.trb, cmd->tcs);
+	TRB_SET_TSP(cmd->_header.trb, cmd->tsp);
 	TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
 	TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
Index: uspace/drv/bus/usb/xhci/commands.h
===================================================================
--- uspace/drv/bus/usb/xhci/commands.h	(revision 0577066660ce1e30ed4d91fc1335280501a120db)
+++ uspace/drv/bus/usb/xhci/commands.h	(revision e7f21884042a1982eca8bad23a6e3328530c1d9a)
@@ -117,5 +117,5 @@
 	uintptr_t dequeue_ptr;
 
-	uint8_t tcs;
+	bool tsp;
 	uint8_t susp;
 	uint8_t device_speed;