Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision 957ce9a5e82fdc2f9f57ce2bd64154528904dfcc)
+++ kernel/arch/arm32/src/fpu_context.c	(revision e5c8bc6db05856c90d811bc6a138f38da3efea6f)
@@ -63,6 +63,6 @@
 	asm volatile (
 		"vmrs r1, fpscr\n"
-		"stm %0, {r1}\n"
-		"vstm %0, {s0-s31}\n"
+		"stmia %0!, {r1}\n"
+		"vstmia %0!, {s0-s31}\n"
 		::"r" (ctx): "r1","memory"
 	);
@@ -76,7 +76,7 @@
 {
 	asm volatile (
-		"ldm %0, {r1}\n"
+		"ldmia %0!, {r1}\n"
 		"vmsr fpscr, r1\n"
-		"vldm %0, {s0-s31}\n"
+		"vldmia %0!, {s0-s31}\n"
 		::"r" (ctx): "r1"
 	);
@@ -91,6 +91,6 @@
 	asm volatile (
 		"vmrs r1, fpscr\n"
-		"stm %0, {r1}\n"
-		"vstm %0, {d0-d15}\n"
+		"stmia %0!, {r1}\n"
+		"vstmia %0!, {d0-d15}\n"
 		::"r" (ctx): "r1","memory"
 	);
@@ -104,7 +104,7 @@
 {
 	asm volatile (
-		"ldm %0, {r1}\n"
+		"ldmia %0!, {r1}\n"
 		"vmsr fpscr, r1\n"
-		"vldm %0, {d0-d15}\n"
+		"vldmia %0!, {d0-d15}\n"
 		::"r" (ctx): "r1"
 	);
@@ -119,7 +119,7 @@
 	asm volatile (
 		"vmrs r1, fpscr\n"
-		"stm %0, {r1}\n"
-		"vstm %0, {d0-d15}\n"
-		"vstm %0, {d16-d31}\n"
+		"stmia %0!, {r1}\n"
+		"vstmia %0!, {d0-d15}\n"
+		"vstmia %0!, {d16-d31}\n"
 		::"r" (ctx): "r1","memory"
 	);
@@ -133,8 +133,8 @@
 {
 	asm volatile (
-		"ldm %0, {r1}\n"
+		"ldmia %0!, {r1}\n"
 		"vmsr fpscr, r1\n"
-		"vldm %0, {d0-d15}\n"
-		"vldm %0, {d16-d31}\n"
+		"vldmia %0!, {d0-d15}\n"
+		"vldmia %0!, {d16-d31}\n"
 		::"r" (ctx): "r1"
 	);