Index: kernel/arch/ia64/include/mm/page.h
===================================================================
--- kernel/arch/ia64/include/mm/page.h	(revision 59e4864a51a79cbe1c491a3c86539b884e9005e6)
+++ kernel/arch/ia64/include/mm/page.h	(revision e55571317c3b62308d58f97fb8f2aa78c6fd7aa4)
@@ -49,5 +49,12 @@
 #define FW_PAGE_WIDTH			28	/* 256M */
 
-/** Staticly mapped IO spaces */
+#define USPACE_IO_PAGE_WIDTH		12	/* 4K */
+
+
+
+/** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses 
+becauce of "minimal virtual bits implemented is 51"
+it is possible to have here values up to 0x0007000000000000
+*/
 
 /* Firmware area (bellow 4GB in phys mem) */
Index: kernel/arch/ia64/include/mm/tlb.h
===================================================================
--- kernel/arch/ia64/include/mm/tlb.h	(revision 59e4864a51a79cbe1c491a3c86539b884e9005e6)
+++ kernel/arch/ia64/include/mm/tlb.h	(revision e55571317c3b62308d58f97fb8f2aa78c6fd7aa4)
@@ -47,6 +47,6 @@
 #define DTR_KERNEL	0
 #define ITR_KERNEL	0
-#define DTR_KSTACK1	1
-#define DTR_KSTACK2	2
+#define DTR_KSTACK1	4
+#define DTR_KSTACK2	5
 
 /** Portion of TLB insertion format data structure. */