Changeset e47ed05 in mainline for kernel/genarch/src/drivers/grlib/uart.c
- Timestamp:
- 2013-12-27T18:18:13Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f6f22cdb
- Parents:
- 96b9724
- File:
-
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
kernel/genarch/src/drivers/grlib/uart.c
r96b9724 re47ed05 37 37 */ 38 38 39 #include <genarch/drivers/grlib _uart/grlib_uart.h>39 #include <genarch/drivers/grlib/uart.h> 40 40 #include <console/chardev.h> 41 41 #include <console/console.h> … … 50 50 static void grlib_uart_sendb(outdev_t *dev, uint8_t byte) 51 51 { 52 uint32_t reg;53 52 grlib_uart_status_t *status; 54 grlib_uart_t *uart = 55 (grlib_uart_t *) dev->data; 56 53 grlib_uart_t *uart = (grlib_uart_t *) dev->data; 54 57 55 /* Wait for space becoming available in Tx FIFO. */ 58 56 do { 59 reg = pio_read_32(&uart->io->status);60 status = (grlib_uart_status_t *) ®57 uint32_t reg = pio_read_32(&uart->io->status); 58 status = (grlib_uart_status_t *) ® 61 59 } while (status->tf != 0); 62 60 63 61 pio_write_32(&uart->io->data, byte); 64 62 } … … 66 64 static void grlib_uart_putchar(outdev_t *dev, wchar_t ch) 67 65 { 68 grlib_uart_t *uart = 69 (grlib_uart_t *) dev->data; 66 grlib_uart_t *uart = (grlib_uart_t *) dev->data; 70 67 71 68 if ((!uart->parea.mapped) || (console_override)) { … … 75 72 if (ch == '\n') 76 73 grlib_uart_sendb(dev, (uint8_t) '\r'); 74 77 75 grlib_uart_sendb(dev, (uint8_t) ch); 78 76 } … … 87 85 static void grlib_uart_irq_handler(irq_t *irq) 88 86 { 89 uint32_t reg;90 87 grlib_uart_t *uart = irq->instance; 91 grlib_uart_status_t *status; 92 93 reg = pio_read_32(&uart->io->status); 94 status = (grlib_uart_status_t *)® 95 88 89 uint32_t reg = pio_read_32(&uart->io->status); 90 grlib_uart_status_t *status = (grlib_uart_status_t *) ® 91 96 92 while (status->dr != 0) { 97 93 uint32_t data = pio_read_32(&uart->io->data); 98 94 reg = pio_read_32(&uart->io->status); 99 status = (grlib_uart_status_t *) ®95 status = (grlib_uart_status_t *) ® 100 96 indev_push_character(uart->indev, data & 0xff); 101 97 } … … 109 105 outdev_t *grlib_uart_init(uintptr_t paddr, inr_t inr) 110 106 { 111 printf("grlib_uart_init: paddr=0x%08x\n", paddr);112 113 107 outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC); 114 108 if (!uart_dev) 115 109 return NULL; 116 117 grlib_uart_t *uart = 118 malloc(sizeof(grlib_uart_t), FRAME_ATOMIC); 110 111 grlib_uart_t *uart = malloc(sizeof(grlib_uart_t), FRAME_ATOMIC); 119 112 if (!uart) { 120 113 free(uart_dev); 121 114 return NULL; 122 115 } 123 116 124 117 outdev_initialize("grlib_uart_dev", uart_dev, &grlib_uart_ops); 125 118 uart_dev->data = uart; 126 119 127 120 uart->io = (grlib_uart_io_t *) km_map(paddr, PAGE_SIZE, 128 121 PAGE_WRITE | PAGE_NOT_CACHEABLE); 129 122 uart->indev = NULL; 130 123 131 124 /* Initialize IRQ structure. */ 132 125 irq_initialize(&uart->irq); … … 136 129 uart->irq.handler = grlib_uart_irq_handler; 137 130 uart->irq.instance = uart; 138 131 139 132 /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */ 140 grlib_uart_control_t control = 141 { .fa = 1, .rf = 1, .tf = 1, .ri = 1, 142 .te = 1, .re = 1}; 143 144 uint32_t *reg = (uint32_t *)&control; 133 grlib_uart_control_t control = { 134 .fa = 1, 135 .rf = 1, 136 .tf = 1, 137 .ri = 1, 138 .te = 1, 139 .re = 1 140 }; 141 142 uint32_t *reg = (uint32_t *) &control; 145 143 pio_write_32(&uart->io->control, *reg); 146 144 147 145 link_initialize(&uart->parea.link); 148 146 uart->parea.pbase = paddr; … … 159 157 ASSERT(uart); 160 158 ASSERT(indev); 161 159 162 160 uart->indev = indev; 163 161 irq_register(&uart->irq);
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