Index: kernel/arch/sparc64/src/mm/tsb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tsb.c	(revision 9a7a97029a2915fe7e7b5cf13d8ed2bd225ff1e7)
+++ kernel/arch/sparc64/src/mm/tsb.c	(revision e41455d32a4ca3fd7af54e8ee9e03514294c7153)
@@ -62,4 +62,6 @@
 	
 	i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK;
+	ASSERT(i0 < ITSB_ENTRY_COUNT && i0 < DTSB_ENTRY_COUNT);
+
 	if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT)
 		cnt = ITSB_ENTRY_COUNT;
@@ -85,7 +87,10 @@
 	tsb_entry_t *tsb;
 	index_t entry;
+
+	ASSERT(index <= 1);
 	
 	as = t->as;
 	entry = ((t->page >> MMU_PAGE_WIDTH) + index) & TSB_INDEX_MASK; 
+	ASSERT(entry < ITSB_ENTRY_COUNT);
 	tsb = &as->arch.itsb[entry];
 
@@ -103,6 +108,6 @@
 
 	tsb->tag.context = as->asid;
-	tsb->tag.va_tag = (t->page + (index << MMU_PAGE_WIDTH)) >>
-	    VA_TAG_PAGE_SHIFT;
+	/* the shift is bigger than PAGE_WIDTH, do not bother with index  */
+	tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
 	tsb->data.value = 0;
 	tsb->data.size = PAGESIZE_8K;
@@ -129,6 +134,9 @@
 	index_t entry;
 	
+	ASSERT(index <= 1);
+
 	as = t->as;
 	entry = ((t->page >> MMU_PAGE_WIDTH) + index) & TSB_INDEX_MASK;
+	ASSERT(entry < DTSB_ENTRY_COUNT);
 	tsb = &as->arch.dtsb[entry];
 
@@ -146,6 +154,6 @@
 
 	tsb->tag.context = as->asid;
-	tsb->tag.va_tag = (t->page + (index << MMU_PAGE_WIDTH)) >>
-	    VA_TAG_PAGE_SHIFT;
+	/* the shift is bigger than PAGE_WIDTH, do not bother with index */
+	tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
 	tsb->data.value = 0;
 	tsb->data.size = PAGESIZE_8K;