Changeset e3bc355 in mainline for kernel/arch/ia32


Ignore:
Timestamp:
2013-07-28T23:07:18Z (13 years ago)
Author:
Dominik Taborsky (AT DOT) <brembyseznamcz>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2b55edb
Parents:
283ea3d (diff), ccdc63e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

mainline merge

Location:
kernel/arch/ia32
Files:
2 added
2 deleted
7 edited
35 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia32/Makefile.inc

    r283ea3d re3bc355  
    3030BFD_ARCH = i386
    3131BFD = binary
    32 CLANG_ARCH = i386
    3332
    3433BITS = 32
    … …  
    105104        arch/$(KARCH)/src/boot/memmap.c \
    106105        arch/$(KARCH)/src/fpu_context.c \
    107         arch/$(KARCH)/src/debugger.c \
    108106        arch/$(KARCH)/src/syscall.c

  • kernel/arch/ia32/include/arch/cpu.h

    r283ea3d re3bc355  
    4141#define EFLAGS_RF       (1 << 16)
    4242
    43 #define CR4_OSFXSR_MASK (1<<9)
     43#define CR4_OSFXSR_MASK      (1 << 9)
     44#define CR4_OSXMMEXCPT_MASK  (1 << 10)
    4445
    4546/* Support for SYSENTER and SYSEXIT */
    … …  
    5960        unsigned int model;
    6061        unsigned int stepping;
    61         cpuid_feature_info fi;
    62 
     62        cpuid_feature_info_t fi;
     63       
    6364        tss_t *tss;
    6465       

  • kernel/arch/ia32/include/arch/cpuid.h

    r283ea3d re3bc355  
    5050        uint32_t cpuid_ecx;
    5151        uint32_t cpuid_edx;
    52 } __attribute__ ((packed)) cpu_info_t;
     52} __attribute__((packed)) cpu_info_t;
    5353
    54 struct __cpuid_extended_feature_info {
    55         unsigned sse3 : 1;
    56         unsigned     : 31;
    57 } __attribute__ ((packed));
     54struct cpuid_extended_feature_info {
     55        unsigned int sse3 : 1;
     56        unsigned int : 31;
     57} __attribute__((packed));
    5858
    59 typedef union cpuid_extended_feature_info {
    60         struct __cpuid_extended_feature_info bits;
     59typedef union {
     60        struct cpuid_extended_feature_info bits;
    6161        uint32_t word;
    62 } cpuid_extended_feature_info;
     62} cpuid_extended_feature_info_t;
    6363
    64 struct __cpuid_feature_info {
    65         unsigned     : 11;
    66         unsigned sep  : 1;
    67         unsigned     : 11;
    68         unsigned mmx  : 1;
    69         unsigned fxsr : 1;
    70         unsigned sse  : 1;
    71         unsigned sse2 : 1;
    72         unsigned      : 5;
    73 } __attribute__ ((packed));
     64struct cpuid_feature_info {
     65        unsigned int : 11;
     66        unsigned int sep  : 1;
     67        unsigned int : 11;
     68        unsigned int mmx  : 1;
     69        unsigned int fxsr : 1;
     70        unsigned int sse  : 1;
     71        unsigned int sse2 : 1;
     72        unsigned int : 5;
     73} __attribute__((packed));
    7474
    75 typedef union cpuid_feature_info {
    76         struct __cpuid_feature_info bits;
     75typedef union {
     76        struct cpuid_feature_info bits;
    7777        uint32_t word;
    78 } cpuid_feature_info;
    79 
     78} cpuid_feature_info_t;
    8079
    8180static inline uint32_t has_cpuid(void)
    8281{
    83         uint32_t val, ret;
     82        uint32_t val;
     83        uint32_t ret;
    8484       
    8585        asm volatile (

  • kernel/arch/ia32/include/arch/istate.h

    r283ea3d re3bc355  
    6868} istate_t;
    6969
     70#define RPL_USER        3
     71
    7072/** Return true if exception happened while in userspace */
    7173NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    7274{
    73         return !(istate->eip & UINT32_C(0x80000000));
     75        return (istate->cs & RPL_USER) == RPL_USER;
    7476}
    7577

  • kernel/arch/ia32/include/arch/pm.h

    r283ea3d re3bc355  
    5050
    5151#define VESA_INIT_SEGMENT  0x8000
    52 #define VESA_INIT_DES      7
     52#define VESA_INIT_CODE_DES      7
     53#define VESA_INIT_DATA_DES      8
    5354#define KTEXT32_DES        KTEXT_DES
    5455
    5556#undef GDT_ITEMS
    56 #define GDT_ITEMS  8
     57#define GDT_ITEMS  9
    5758
    5859#endif /* CONFIG_FB */
    … …  
    6768#define AR_CODE       (3 << 3)
    6869#define AR_WRITABLE   (1 << 1)
     70#define AR_READABLE   (1 << 1)
    6971#define AR_INTERRUPT  (0xe)
    7072#define AR_TRAP       (0xf)

  • kernel/arch/ia32/src/boot/vesa_real.inc

    r283ea3d re3bc355  
    3131vesa_init:
    3232        lidtl vesa_idtr
    33         jmp $GDT_SELECTOR(VESA_INIT_DES), $vesa_init_real - vesa_init
     33       
     34        mov $GDT_SELECTOR(VESA_INIT_DATA_DES), %bx
     35       
     36        mov %bx, %es
     37        mov %bx, %fs
     38        mov %bx, %gs
     39        mov %bx, %ds
     40        mov %bx, %ss
     41       
     42        jmp $GDT_SELECTOR(VESA_INIT_CODE_DES), $vesa_init_real - vesa_init
    3443
    3544vesa_idtr:
    … …  
    3948.code16
    4049vesa_init_real:
    41        
    4250        mov %cr0, %eax
    4351        and $~1, %eax
    … …  
    4553       
    4654        jmp $VESA_INIT_SEGMENT, $vesa_init_real2 - vesa_init
    47        
     55
    4856vesa_init_real2:
    4957        mov $VESA_INIT_SEGMENT, %bx

  • kernel/arch/ia32/src/cpu/cpu.c

    r283ea3d re3bc355  
    115115                        "mov %[help], %%cr4\n"
    116116                        : [help] "+r" (help)
    117                         : [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
     117                        : [mask] "i" (CR4_OSFXSR_MASK | CR4_OSXMMEXCPT_MASK)
    118118                );
    119119        }
    120 
     120       
    121121#ifndef PROCESSOR_i486
    122122        if (CPU->arch.fi.bits.sep) {

  • kernel/arch/ia32/src/fpu_context.c

    r283ea3d re3bc355  
    2727 */
    2828
    29 /** @addtogroup ia32   
     29/** @addtogroup ia32
    3030 * @{
    3131 */
    … …  
    3838#include <cpu.h>
    3939
     40/** x87 FPU scr values (P3+ MMX2) */
     41enum {
     42        X87_FLUSH_ZERO_FLAG = (1 << 15),
     43        X87_ROUND_CONTROL_MASK = (0x3 << 13),
     44        x87_ROUND_TO_NEAREST_EVEN = (0x0 << 13),
     45        X87_ROUND_DOWN_TO_NEG_INF = (0x1 << 13),
     46        X87_ROUND_UP_TO_POS_INF = (0x2 << 13),
     47        X87_ROUND_TO_ZERO = (0x3 << 13),
     48        X87_PRECISION_MASK = (1 << 12),
     49        X87_UNDERFLOW_MASK = (1 << 11),
     50        X87_OVERFLOW_MASK = (1 << 10),
     51        X87_ZERO_DIV_MASK = (1 << 9),
     52        X87_DENORMAL_OP_MASK = (1 << 8),
     53        X87_INVALID_OP_MASK = (1 << 7),
     54        X87_DENOM_ZERO_FLAG = (1 << 6),
     55        X87_PRECISION_EXC_FLAG = (1 << 5),
     56        X87_UNDERFLOW_EXC_FLAG = (1 << 4),
     57        X87_OVERFLOW_EXC_FLAG = (1 << 3),
     58        X87_ZERO_DIV_EXC_FLAG = (1 << 2),
     59        X87_DENORMAL_EXC_FLAG = (1 << 1),
     60        X87_INVALID_OP_EXC_FLAG = (1 << 0),
     61       
     62        X87_ALL_MASK = X87_PRECISION_MASK | X87_UNDERFLOW_MASK | X87_OVERFLOW_MASK | X87_ZERO_DIV_MASK | X87_DENORMAL_OP_MASK | X87_INVALID_OP_MASK,
     63};
     64
    4065typedef void (*fpu_context_function)(fpu_context_t *fctx);
    4166
    42 static fpu_context_function fpu_save, fpu_restore;
     67static fpu_context_function fpu_save;
     68static fpu_context_function fpu_restore;
    4369
    4470static void fpu_context_f_save(fpu_context_t *fctx)
    … …  
    77103void fpu_fxsr(void)
    78104{
    79         fpu_save=fpu_context_fx_save;
    80         fpu_restore=fpu_context_fx_restore;
     105        fpu_save = fpu_context_fx_save;
     106        fpu_restore = fpu_context_fx_restore;
    81107}
    82108
    … …  
    98124}
    99125
     126/** Initialize x87 FPU. Mask all exceptions. */
    100127void fpu_init()
    101128{
    … …  
    111138                "ldmxcsr %[help0]\n"
    112139                : [help0] "+m" (help0), [help1] "+r" (help1)
    113                 : [magic] "i" (0x1f80)
     140                : [magic] "i" (X87_ALL_MASK)
    114141        );
    115142}

  • kernel/arch/ia32/src/ia32.c

    r283ea3d re3bc355  
    4545#include <arch/bios/bios.h>
    4646#include <arch/boot/boot.h>
    47 #include <arch/debugger.h>
    4847#include <arch/drivers/i8254.h>
    4948#include <arch/drivers/i8259.h>
    … …  
    118117#endif
    119118               
    120                 /* Enable debugger */
    121                 debugger_init();
    122119                /* Merge all memory zones to 1 big zone */
    123120                zone_merge_all();

  • kernel/arch/ia32/src/mm/page.c

    r283ea3d re3bc355  
    8484void page_fault(unsigned int n __attribute__((unused)), istate_t *istate)
    8585{
    86         uintptr_t page;
     86        uintptr_t badvaddr;
    8787        pf_access_t access;
    8888       
    89         page = read_cr2();
     89        badvaddr = read_cr2();
    9090               
    9191        if (istate->error_word & PFERR_CODE_RSVD)
    … …  
    9797                access = PF_ACCESS_READ;
    9898       
    99         if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
    100                 fault_if_from_uspace(istate, "Page fault: %#x.", page);
    101                 panic_memtrap(istate, access, page, NULL);
    102         }
     99        (void) as_page_fault(badvaddr, access, istate);
    103100}
    104101

  • kernel/arch/ia32/src/pm.c

    r283ea3d re3bc355  
    7575        /* VESA Init descriptor */
    7676#ifdef CONFIG_FB
    77         { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
     77        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | AR_READABLE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 },
     78        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
    7879#endif
    7980};
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