Index: kernel/arch/mips32/include/mm/tlb.h
===================================================================
--- kernel/arch/mips32/include/mm/tlb.h	(revision a2a2a34a30c500db7cc8308839952d3f014a1e19)
+++ kernel/arch/mips32/include/mm/tlb.h	(revision e2d97d7bfe776e01d487348ba0105bc415e371cc)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32mm	
+/** @addtogroup mips32mm
  * @{
  */
@@ -41,40 +41,36 @@
 #include <arch/exception.h>
 
-#ifdef TLBCNT
-#	define TLB_ENTRY_COUNT		TLBCNT
-#else
-#	define TLB_ENTRY_COUNT		48
-#endif
+#define TLB_ENTRY_COUNT  48
 
-#define TLB_WIRED		1
-#define TLB_KSTACK_WIRED_INDEX	0
+#define TLB_WIRED               1
+#define TLB_KSTACK_WIRED_INDEX  0
 
-#define TLB_PAGE_MASK_4K	(0x000 << 13)
-#define TLB_PAGE_MASK_16K	(0x003 << 13)
-#define TLB_PAGE_MASK_64K	(0x00f << 13)
-#define TLB_PAGE_MASK_256K	(0x03f << 13)
-#define TLB_PAGE_MASK_1M	(0x0ff << 13)
-#define TLB_PAGE_MASK_4M	(0x3ff << 13)
-#define TLB_PAGE_MASK_16M	(0xfff << 13)
+#define TLB_PAGE_MASK_4K    (0x000 << 13)
+#define TLB_PAGE_MASK_16K   (0x003 << 13)
+#define TLB_PAGE_MASK_64K   (0x00f << 13)
+#define TLB_PAGE_MASK_256K  (0x03f << 13)
+#define TLB_PAGE_MASK_1M    (0x0ff << 13)
+#define TLB_PAGE_MASK_4M    (0x3ff << 13)
+#define TLB_PAGE_MASK_16M   (0xfff << 13)
 
-#define PAGE_UNCACHED			2
-#define PAGE_CACHEABLE_EXC_WRITE	5
+#define PAGE_UNCACHED             2
+#define PAGE_CACHEABLE_EXC_WRITE  5
 
 typedef union {
 	struct {
 #ifdef BIG_ENDIAN
-		unsigned : 2;		/* zero */
-		unsigned pfn : 24;	/* frame number */
-		unsigned c : 3; 	/* cache coherency attribute */
-		unsigned d : 1; 	/* dirty/write-protect bit */
-		unsigned v : 1; 	/* valid bit */
-		unsigned g : 1; 	/* global bit */
+		unsigned : 2;       /* zero */
+		unsigned pfn : 24;  /* frame number */
+		unsigned c : 3;     /* cache coherency attribute */
+		unsigned d : 1;     /* dirty/write-protect bit */
+		unsigned v : 1;     /* valid bit */
+		unsigned g : 1;     /* global bit */
 #else
-		unsigned g : 1; 	/* global bit */
-		unsigned v : 1; 	/* valid bit */
-		unsigned d : 1; 	/* dirty/write-protect bit */
-		unsigned c : 3; 	/* cache coherency attribute */
-		unsigned pfn : 24;	/* frame number */
-		unsigned : 2;		/* zero */
+		unsigned g : 1;     /* global bit */
+		unsigned v : 1;     /* valid bit */
+		unsigned d : 1;     /* dirty/write-protect bit */
+		unsigned c : 3;     /* cache coherency attribute */
+		unsigned pfn : 24;  /* frame number */
+		unsigned : 2;       /* zero */
 #endif
 	} __attribute__ ((packed));
@@ -164,5 +160,5 @@
 }
 
-#define tlb_invalidate(asid)	tlb_invalidate_asid(asid)
+#define tlb_invalidate(asid)  tlb_invalidate_asid(asid)
 
 extern void tlb_invalid(istate_t *istate);