Ignore:
Timestamp:
2008-06-13T20:36:38Z (17 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d5087aa
Parents:
80dabb8d
Message:

Add smc_coherence() macro to all architectures.
So far, only amd64, ia32, ia64 and sparc64 are implemented.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/mm/tlb.h

    r80dabb8d re25eca80  
    161161{
    162162        asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
    163         flush();
     163        flush_blind();
    164164}
    165165
     
    180180{
    181181        asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v);
    182         flush();
     182        flush_blind();
    183183}
    184184
     
    210210        reg.tlb_entry = entry;
    211211        asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
    212         flush();
     212        flush_blind();
    213213}
    214214
     
    280280{
    281281        asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
    282         flush();
     282        flush_blind();
    283283}
    284284
     
    319319{
    320320        asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
    321         flush();
     321        flush_blind();
    322322}
    323323
     
    348348{
    349349        asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v);
    350         flush();
     350        flush_blind();
    351351}
    352352
     
    401401                                                         * address within the
    402402                                                         * ASI */
    403         flush();
     403        flush_blind();
    404404}
    405405
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