Index: kernel/arch/ia32/src/drivers/i8254.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8254.c	(revision 06ae793150dfa79fa455b8d805a4e29fd70413fe)
+++ kernel/arch/ia32/src/drivers/i8254.c	(revision e0a4686ebb68dd7d42dd083c5ea6c37d6ced027d)
@@ -89,5 +89,5 @@
 	i8254_irq.handler = i8254_irq_handler;
 	irq_register(&i8254_irq);
-	
+
 	i8254_normal_operation();
 }
@@ -111,9 +111,9 @@
 	pio_write_8(CLK_PORT1, 0xff);
 	pio_write_8(CLK_PORT1, 0xff);
-	
+
 	uint8_t not_ok;
 	uint32_t t1;
 	uint32_t t2;
-	
+
 	do {
 		/* will read both status and count */
@@ -123,11 +123,11 @@
 		t1 |= pio_read_8(CLK_PORT1) << 8;
 	} while (not_ok);
-	
+
 	asm_delay_loop(LOOPS);
-	
+
 	pio_write_8(CLK_PORT4, 0xd2);
 	t2 = pio_read_8(CLK_PORT1);
 	t2 |= pio_read_8(CLK_PORT1) << 8;
-	
+
 	/*
 	 * We want to determine the overhead of the calibrating mechanism.
@@ -136,21 +136,21 @@
 	uint32_t o1 = pio_read_8(CLK_PORT1);
 	o1 |= pio_read_8(CLK_PORT1) << 8;
-	
+
 	asm_fake_loop(LOOPS);
-	
+
 	pio_write_8(CLK_PORT4, 0xd2);
 	uint32_t o2 = pio_read_8(CLK_PORT1);
 	o2 |= pio_read_8(CLK_PORT1) << 8;
-	
+
 	CPU->delay_loop_const =
 	    ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
 	    (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
-	
+
 	uint64_t clk1 = get_cycle();
 	delay(1 << SHIFT);
 	uint64_t clk2 = get_cycle();
-	
+
 	CPU->frequency_mhz = (clk2 - clk1) >> SHIFT;
-	
+
 	return;
 }