Changeset df6ded8 in mainline for uspace/drv/bus/usb/ohci/hw_struct

Timestamp:

2018-02-28T16:37:50Z (8 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1b20da0

Parents:

f5e5f73 (diff), b2dca8de (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

git-author:

Jakub Jermar <jakub@…> (2018-02-28 16:06:42)

git-committer:

Jakub Jermar <jakub@…> (2018-02-28 16:37:50)

Message:

Merge github.com:helenos-xhci-team/helenos

This commit merges support for USB 3 and generally refactors, fixes,
extends and cleans up the existing USB framework.

Notable additions and features:

• new host controller driver has been implemented to control various xHC models (among others, NEC Renesas uPD720200)
• isochronous data transfer mode
• support for explicit USB device removal
• USB tablet driver

Location:

uspace/drv/bus/usb/ohci/hw_struct

Files:

• endpoint_descriptor.c (modified) (3 diffs)
• endpoint_descriptor.h (modified) (4 diffs)
• iso_transfer_descriptor.h (modified) (1 diff)
• transfer_descriptor.c (modified) (1 diff)
• transfer_descriptor.h (modified) (2 diffs)

uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c

@@ -40 +40 @@
 #include <usb/usb.h>
 #include <usb/host/utils/malloc32.h>
+#include <usb/host/endpoint.h>
+#include <usb/host/bus.h>
 
 #include "mem_access.h"
@@ -79 +81 @@
         /* Status: address, endpoint nr, direction mask and max packet size. */
         OHCI_MEM32_WR(instance->status,
-            ((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)
+            ((ep->device->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)
             | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT)
             | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT)
-            | ((ep->max_packet_size & ED_STATUS_MPS_MASK)
-                << ED_STATUS_MPS_SHIFT));
+            | ((ep->max_packet_size & ED_STATUS_MPS_MASK) << ED_STATUS_MPS_SHIFT));
 
         /* Low speed flag */
-        if (ep->speed == USB_SPEED_LOW)
+        if (ep->device->speed == USB_SPEED_LOW)
                 OHCI_MEM32_SET(instance->status, ED_STATUS_S_FLAG);
 
@@ -98 +99 @@
         OHCI_MEM32_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK);
         OHCI_MEM32_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);
-
-        /* Set toggle bit */
-        if (ep->toggle)
-                OHCI_MEM32_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
-
 }
 /**

uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h

@@ -1 +1 @@
 /*
  * Copyright (c) 2011 Jan Vesely
+ * Copyright (c) 2018 Ondrej Hlavaty
  * All rights reserved.
  *
@@ -106 +107 @@
 #define ED_NEXT_PTR_MASK (0xfffffff0)
 #define ED_NEXT_PTR_SHIFT (0)
-} __attribute__((packed)) ed_t;
+} __attribute__((packed, aligned(32))) ed_t;
 
 void ed_init(ed_t *instance, const endpoint_t *ep, const td_t *td);
@@ -162 +163 @@
         assert(instance);
         return OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK;
+}
+
+/**
+ * Set the HeadP of ED. Do not call unless the ED is Halted.
+ * @param instance ED
+ */
+static inline void ed_set_head_td(ed_t *instance, const td_t *td)
+{
+        assert(instance);
+        const uintptr_t pa = addr_to_phys(td);
+        OHCI_MEM32_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK);
 }
 
@@ -192 +204 @@
 {
         assert(instance);
-        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0;
+        return !!(OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_TOGGLE_CARRY);
 }
 

uspace/drv/bus/usb/ohci/hw_struct/iso_transfer_descriptor.h

@@ -69 +69 @@
 #define ITD_OFFSET_CC_SHIFT (12)
 
-} __attribute__((packed)) itd_t;
+} __attribute__((packed, aligned(32))) itd_t;
 
 #endif

uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c

@@ -88 +88 @@
         }
 
+        td_set_next(instance, next);
+}
+
+void td_set_next(td_t *instance, const td_t *next)
+{
         OHCI_MEM32_WR(instance->next, addr_to_phys(next) & TD_NEXT_PTR_MASK);
+}
 
-}
 /**
  * @}

uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h

@@ -90 +90 @@
          */
         volatile uint32_t be;
-} __attribute__((packed)) td_t;
+} __attribute__((packed, aligned(32))) td_t;
 
-void td_init(td_t *instance, const td_t *next,
-    usb_direction_t dir, const void *buffer, size_t size, int toggle);
+void td_init(td_t *, const td_t *, usb_direction_t, const void *, size_t, int);
+void td_set_next(td_t *, const td_t *);
 
 /**
@@ -103 +103 @@
 {
         assert(instance);
-        const int cc =(OHCI_MEM32_RD(instance->status)
-            >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
+        const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT)
+                & TD_STATUS_CC_MASK;
         /* This value is changed on transfer completion,
          * either to CC_NOERROR or and error code.