Changeset df3c6f02 in mainline for kernel/arch/ia64/src

Timestamp:

2011-05-31T22:58:56Z (15 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

d362410

Parents:

82582e4 (diff), 4ce90544 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

Location:

kernel/arch/ia64/src

Files:

• ia64.c (modified) (1 diff)
• ivt.S (modified) (3 diffs)
• mm/tlb.c (modified) (7 diffs)
• proc/scheduler.c (modified) (2 diffs)
• start.S (modified) (1 diff)

kernel/arch/ia64/src/ia64.c

@@ -249 +249 @@
         rsc.mode = 3;                   /* eager mode */
 
+        /*
+         * Switch to userspace.
+         *
+         * When calculating stack addresses, mind the stack split between the
+         * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
+         */
         switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
-            ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
+            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
             ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
-            ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
+            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
             (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
 

kernel/arch/ia64/src/ivt.S

@@ -50 +50 @@
 #define R_KSTACK_BSP    r22     /* keep in sync with before_thread_runs_arch() */
 #define R_KSTACK        r23     /* keep in sync with before_thread_runs_arch() */
+
+/* Speculation vector handler */
+.macro SPECULATION_VECTOR_HANDLER offs
+    .org ivt + \offs
+
+    /* 1. Save predicates, IIM, IIP, IPSR and ISR CR's in bank 0 registers. */
+        mov r16 = pr
+        mov r17 = cr.iim
+        mov r18 = cr.iip
+        mov r19 = cr.ipsr
+        mov r20 = cr.isr ;;
+        
+    /* 2. Move IIP to IIPA. */
+        mov cr.iipa = r18
+        
+    /* 3. Sign extend IIM[20:0], shift left by 4 and add to IIP. */
+        shl r17 = r17, 43 ;;    /* shift bit 20 to bit 63 */
+        shr r17 = r17, 39 ;;    /* signed shift right to bit 24 */
+        add r18 = r18, r17 ;;
+        mov cr.iip = r18
+        
+    /* 4. Set IPSR.ri to 0. */
+        dep r19 = 0, r19, PSR_RI_SHIFT, PSR_RI_LEN ;;
+        mov cr.ipsr = r19
+        
+    /* 5. Check whether IPSR.tb or IPSR.ss is set. */
+
+        /* TODO:
+         * Implement this when Taken Branch and Single Step traps can occur.
+         */
+    
+    /* 6. Restore predicates and return from interruption. */
+        mov pr = r16 ;;
+        rfi
+.endm
 
 /** Heavyweight interrupt handler
@@ -391 +426 @@
 
     /* 10. call handler */
-        movl r1 = kernel_image_start
+        movl r1 = __gp
     
         mov b1 = loc2
@@ -541 +576 @@
         HEAVYWEIGHT_HANDLER 0x5500 disabled_fp_register
         HEAVYWEIGHT_HANDLER 0x5600
-        HEAVYWEIGHT_HANDLER 0x5700
+        SPECULATION_VECTOR_HANDLER 0x5700
         HEAVYWEIGHT_HANDLER 0x5800
         HEAVYWEIGHT_HANDLER 0x5900

kernel/arch/ia64/src/mm/tlb.c

@@ -481 +481 @@
         
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         if (t) {
                 /*
@@ -599 +599 @@
         
         page_table_lock(AS, true);
-        pte_t *entry = page_mapping_find(AS, va);
+        pte_t *entry = page_mapping_find(AS, va, true);
         if (entry) {
                 /*
@@ -651 +651 @@
         
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p) && (t->w)) {
@@ -684 +684 @@
         
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p) && (t->x)) {
@@ -717 +717 @@
         
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p)) {
@@ -753 +753 @@
          */
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         ASSERT(!t->w);
@@ -778 +778 @@
         
         page_table_lock(AS, true);
-        t = page_mapping_find(AS, va);
+        t = page_mapping_find(AS, va, true);
         ASSERT(t);
         

kernel/arch/ia64/src/proc/scheduler.c

@@ -79 +79 @@
          * Record address of kernel stack to bank 0 r23.
          * These values will be found there after switch from userspace.
+         *
+         * Mind the 1:1 split of the entire STACK_SIZE long region between the
+         * memory stack and the RSE stack.
          */
         asm volatile (
@@ -86 +89 @@
                 "bsw.1\n"
                 :
-                : "r" (&THREAD->kstack[THREAD_STACK_SIZE]),
-                  "r" (&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])
+                : "r" (&THREAD->kstack[STACK_SIZE / 2]),
+                  "r" (&THREAD->kstack[STACK_SIZE / 2 - SP_DELTA])
                 );
 }

kernel/arch/ia64/src/start.S

@@ -174 +174 @@
         
         # Initialize gp (Global Pointer) register
-        movl gp = kernel_image_start
+        movl gp = __gp
         
-        #       
+        #
         # Initialize bootinfo on BSP.
         #