Index: kernel/arch/ia64/include/mm/as.h
===================================================================
--- kernel/arch/ia64/include/mm/as.h	(revision 925be4ecd563f177285f5d0da2d0bf42b4bb85f6)
+++ kernel/arch/ia64/include/mm/as.h	(revision de48286a63fd1c84637ce59dfe502d6dbcf2b331)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64mm	
+/** @addtogroup ia64mm
  * @{
  */
@@ -36,12 +36,12 @@
 #define KERN_ia64_AS_H_
 
-#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH	0
+#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
 
-#define KERNEL_ADDRESS_SPACE_START_ARCH		(unsigned long) 0xe000000000000000ULL
-#define KERNEL_ADDRESS_SPACE_END_ARCH		(unsigned long) 0xffffffffffffffffULL
-#define USER_ADDRESS_SPACE_START_ARCH		(unsigned long) 0x0000000000000000ULL
-#define USER_ADDRESS_SPACE_END_ARCH		(unsigned long) 0xdfffffffffffffffULL
+#define KERNEL_ADDRESS_SPACE_START_ARCH  ((unsigned long) 0xe000000000000000ULL)
+#define KERNEL_ADDRESS_SPACE_END_ARCH    ((unsigned long) 0xffffffffffffffffULL)
+#define USER_ADDRESS_SPACE_START_ARCH    ((unsigned long) 0x0000000000000000ULL)
+#define USER_ADDRESS_SPACE_END_ARCH      ((unsigned long) 0xdfffffffffffffffULL)
 
-#define USTACK_ADDRESS_ARCH	0x0000000ff0000000ULL
+#define USTACK_ADDRESS_ARCH  0x0000000ff0000000ULL
 
 typedef struct {
@@ -50,7 +50,7 @@
 #include <genarch/mm/as_ht.h>
 
-#define as_constructor_arch(as, flags)		(as != as)
-#define as_destructor_arch(as)			(as != as)
-#define as_create_arch(as, flags)		(as != as)
+#define as_constructor_arch(as, flags)  (as != as)
+#define as_destructor_arch(as)          (as != as)
+#define as_create_arch(as, flags)       (as != as)
 #define as_deinstall_arch(as)
 #define as_invalidate_translation_cache(as, page, cnt)
Index: kernel/arch/ia64/include/mm/page.h
===================================================================
--- kernel/arch/ia64/include/mm/page.h	(revision 925be4ecd563f177285f5d0da2d0bf42b4bb85f6)
+++ kernel/arch/ia64/include/mm/page.h	(revision de48286a63fd1c84637ce59dfe502d6dbcf2b331)
@@ -28,5 +28,5 @@
  */
 
-/** @addtogroup ia64mm	
+/** @addtogroup ia64mm
  * @{
  */
@@ -39,15 +39,15 @@
 #include <arch/mm/frame.h>
 
-#define PAGE_SIZE	FRAME_SIZE
-#define PAGE_WIDTH	FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
+#define PAGE_WIDTH  FRAME_WIDTH
 
 #ifdef KERNEL
 
 /** Bit width of the TLB-locked portion of kernel address space. */
-#define KERNEL_PAGE_WIDTH		28	/* 256M */
-#define IO_PAGE_WIDTH			26	/* 64M */
-#define FW_PAGE_WIDTH			28	/* 256M */
-
-#define USPACE_IO_PAGE_WIDTH		12	/* 4K */
+#define KERNEL_PAGE_WIDTH  28  /* 256M */
+#define IO_PAGE_WIDTH      26  /* 64M */
+#define FW_PAGE_WIDTH      28  /* 256M */
+
+#define USPACE_IO_PAGE_WIDTH  12  /* 4K */
 
 
@@ -59,45 +59,45 @@
 
 /* Firmware area (bellow 4GB in phys mem) */
-#define FW_OFFSET             0x00000000F0000000
+#define FW_OFFSET   0x00000000F0000000
 /* Legacy IO space */
-#define IO_OFFSET             0x0001000000000000
+#define IO_OFFSET   0x0001000000000000
 /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
-#define VIO_OFFSET            0x0002000000000000
-
-
-#define PPN_SHIFT			12
-
-#define VRN_SHIFT			61
-#define VRN_MASK			(7LL << VRN_SHIFT)
-#define VA2VRN(va)			((va)>>VRN_SHIFT)
+#define VIO_OFFSET  0x0002000000000000
+
+
+#define PPN_SHIFT  12
+
+#define VRN_SHIFT   61
+#define VRN_MASK    (7ULL << VRN_SHIFT)
+#define VA2VRN(va)  ((va) >> VRN_SHIFT)
 
 #ifdef __ASM__
-#define VRN_KERNEL	 		7
+	#define VRN_KERNEL  7
 #else
-#define VRN_KERNEL	 		7LL
+	#define VRN_KERNEL  7ULL
 #endif
 
-#define REGION_REGISTERS 		8
-
-#define KA2PA(x)	((uintptr_t) (x - (VRN_KERNEL << VRN_SHIFT)))
-#define PA2KA(x)	((uintptr_t) (x + (VRN_KERNEL << VRN_SHIFT)))
-
-#define VHPT_WIDTH 			20	/* 1M */
-#define VHPT_SIZE 			(1 << VHPT_WIDTH)
-
-#define PTA_BASE_SHIFT			15
+#define REGION_REGISTERS  8
+
+#define KA2PA(x)  ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT)))
+#define PA2KA(x)  ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT)))
+
+#define VHPT_WIDTH  20  /* 1M */
+#define VHPT_SIZE   (1 << VHPT_WIDTH)
+
+#define PTA_BASE_SHIFT  15
 
 /** Memory Attributes. */
-#define MA_WRITEBACK	0x0
-#define MA_UNCACHEABLE	0x4
+#define MA_WRITEBACK    0x00
+#define MA_UNCACHEABLE  0x04
 
 /** Privilege Levels. Only the most and the least privileged ones are ever used. */
-#define PL_KERNEL	0x0
-#define PL_USER		0x3
+#define PL_KERNEL  0x00
+#define PL_USER    0x03
 
 /* Access Rigths. Only certain combinations are used by the kernel. */
-#define AR_READ		0x0
-#define AR_EXECUTE	0x1
-#define AR_WRITE	0x2
+#define AR_READ     0x00
+#define AR_EXECUTE  0x01
+#define AR_WRITE    0x02
 
 #ifndef __ASM__
@@ -113,5 +113,5 @@
 struct vhpt_tag_info {
 	unsigned long long tag : 63;
-	unsigned ti : 1;
+	unsigned int ti : 1;
 } __attribute__ ((packed));
 
@@ -123,26 +123,26 @@
 struct vhpt_entry_present {
 	/* Word 0 */
-	unsigned p : 1;
-	unsigned : 1;
-	unsigned ma : 3;
-	unsigned a : 1;
-	unsigned d : 1;
-	unsigned pl : 2;
-	unsigned ar : 3;
+	unsigned int p : 1;
+	unsigned int : 1;
+	unsigned int ma : 3;
+	unsigned int a : 1;
+	unsigned int d : 1;
+	unsigned int pl : 2;
+	unsigned int ar : 3;
 	unsigned long long ppn : 38;
-	unsigned : 2;
-	unsigned ed : 1;
-	unsigned ig1 : 11;
+	unsigned int : 2;
+	unsigned int ed : 1;
+	unsigned int ig1 : 11;
 	
 	/* Word 1 */
-	unsigned : 2;
-	unsigned ps : 6;
-	unsigned key : 24;
-	unsigned : 32;
+	unsigned int : 2;
+	unsigned int ps : 6;
+	unsigned int key : 24;
+	unsigned int : 32;
 	
 	/* Word 2 */
 	union vhpt_tag tag;
 	
-	/* Word 3 */													
+	/* Word 3 */
 	uint64_t ig3 : 64;
 } __attribute__ ((packed));
@@ -150,21 +150,21 @@
 struct vhpt_entry_not_present {
 	/* Word 0 */
-	unsigned p : 1;
+	unsigned int p : 1;
 	unsigned long long ig0 : 52;
-	unsigned ig1 : 11;
+	unsigned int ig1 : 11;
 	
 	/* Word 1 */
-	unsigned : 2;
-	unsigned ps : 6;
+	unsigned int : 2;
+	unsigned int ps : 6;
 	unsigned long long ig2 : 56;
-
+	
 	/* Word 2 */
 	union vhpt_tag tag;
 	
-	/* Word 3 */													
+	/* Word 3 */
 	uint64_t ig3 : 64;
 } __attribute__ ((packed));
 
-typedef union vhpt_entry {
+typedef union {
 	struct vhpt_entry_present present;
 	struct vhpt_entry_not_present not_present;
@@ -173,22 +173,22 @@
 
 struct region_register_map {
-	unsigned ve : 1;
-	unsigned : 1;
-	unsigned ps : 6;
-	unsigned rid : 24;
-	unsigned : 32;
-} __attribute__ ((packed));
-
-typedef union region_register {
+	unsigned int ve : 1;
+	unsigned int : 1;
+	unsigned int ps : 6;
+	unsigned int rid : 24;
+	unsigned int : 32;
+} __attribute__ ((packed));
+
+typedef union {
 	struct region_register_map map;
 	unsigned long long word;
-} region_register;
+} region_register_t;
 
 struct pta_register_map {
-	unsigned ve : 1;
-	unsigned : 1;
-	unsigned size : 6;
-	unsigned vf : 1;
-	unsigned : 6;
+	unsigned int ve : 1;
+	unsigned int : 1;
+	unsigned int size : 6;
+	unsigned int vf : 1;
+	unsigned int : 6;
 	unsigned long long base : 49;
 } __attribute__ ((packed));
@@ -197,5 +197,5 @@
 	struct pta_register_map map;
 	uint64_t word;
-} pta_register;
+} pta_register_t;
 
 /** Return Translation Hashed Entry Address.
@@ -211,7 +211,11 @@
 {
 	uint64_t ret;
-
-	asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
-
+	
+	asm volatile (
+		"thash %[ret] = %[va]\n"
+		: [ret] "=r" (ret)
+		: [va] "r" (va)
+	);
+	
 	return ret;
 }
@@ -229,7 +233,11 @@
 {
 	uint64_t ret;
-
-	asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
-
+	
+	asm volatile (
+		"ttag %[ret] = %[va]\n"
+		: [ret] "=r" (ret)
+		: [va] "r" (va)
+	);
+	
 	return ret;
 }
@@ -244,6 +252,13 @@
 {
 	uint64_t ret;
+	
 	ASSERT(i < REGION_REGISTERS);
-	asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
+	
+	asm volatile (
+		"mov %[ret] = rr[%[index]]\n"
+		: [ret] "=r" (ret)
+		: [index] "r" (i << VRN_SHIFT)
+	);
+	
 	return ret;
 }
@@ -257,11 +272,12 @@
 {
 	ASSERT(i < REGION_REGISTERS);
-	asm volatile (
-		"mov rr[%0] = %1\n" 
-		: 
-		: "r" (i << VRN_SHIFT), "r" (v)
-	);
-}
- 
+	
+	asm volatile (
+		"mov rr[%[index]] = %[value]\n"
+		:: [index] "r" (i << VRN_SHIFT),
+		   [value] "r" (v)
+	);
+}
+
 /** Read Page Table Register.
  *
@@ -272,5 +288,8 @@
 	uint64_t ret;
 	
-	asm volatile ("mov %0 = cr.pta\n" : "=r" (ret));
+	asm volatile (
+		"mov %[ret] = cr.pta\n"
+		: [ret] "=r" (ret)
+	);
 	
 	return ret;
@@ -283,5 +302,8 @@
 static inline void pta_write(uint64_t v)
 {
-	asm volatile ("mov cr.pta = %0\n" : : "r" (v));
+	asm volatile (
+		"mov cr.pta = %[value]\n"
+		:: [value] "r" (v)
+	);
 }
 
Index: kernel/arch/ia64/include/mm/tlb.h
===================================================================
--- kernel/arch/ia64/include/mm/tlb.h	(revision 925be4ecd563f177285f5d0da2d0bf42b4bb85f6)
+++ kernel/arch/ia64/include/mm/tlb.h	(revision de48286a63fd1c84637ce59dfe502d6dbcf2b331)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup ia64mm	
+/** @addtogroup ia64mm
  * @{
  */
@@ -42,34 +42,33 @@
 
 /** Data and instruction Translation Register indices. */
-#define DTR_KERNEL	0
-#define ITR_KERNEL	0
-#define DTR_KSTACK1	4
-#define DTR_KSTACK2	5
+#define DTR_KERNEL   0
+#define ITR_KERNEL   0
+#define DTR_KSTACK1  4
+#define DTR_KSTACK2  5
 
 /** Portion of TLB insertion format data structure. */
-union tlb_entry {
+typedef union {
 	uint64_t word[2];
 	struct {
 		/* Word 0 */
-		unsigned p : 1;			/**< Present. */
-		unsigned : 1;
-		unsigned ma : 3;		/**< Memory attribute. */
-		unsigned a : 1;			/**< Accessed. */
-		unsigned d : 1;			/**< Dirty. */
-		unsigned pl : 2;		/**< Privilege level. */
-		unsigned ar : 3;		/**< Access rights. */
-		unsigned long long ppn : 38;	/**< Physical Page Number, a.k.a. PFN. */
-		unsigned : 2;
-		unsigned ed : 1;
-		unsigned ig1 : 11;
-
+		unsigned int p : 1;           /**< Present. */
+		unsigned int : 1;
+		unsigned int ma : 3;          /**< Memory attribute. */
+		unsigned int a : 1;           /**< Accessed. */
+		unsigned int d : 1;           /**< Dirty. */
+		unsigned int pl : 2;          /**< Privilege level. */
+		unsigned int ar : 3;          /**< Access rights. */
+		unsigned long long ppn : 38;  /**< Physical Page Number, a.k.a. PFN. */
+		unsigned int : 2;
+		unsigned int ed : 1;
+		unsigned int ig1 : 11;
+		
 		/* Word 1 */
-		unsigned : 2;
-		unsigned ps : 6;		/**< Page size will be 2^ps. */
-		unsigned key : 24;		/**< Protection key, unused. */
-		unsigned : 32;
+		unsigned int : 2;
+		unsigned int ps : 6;    /**< Page size will be 2^ps. */
+		unsigned int key : 24;  /**< Protection key, unused. */
+		unsigned int : 32;
 	} __attribute__ ((packed));
-} __attribute__ ((packed));
-typedef union tlb_entry tlb_entry_t;
+} __attribute__ ((packed)) tlb_entry_t;
 
 extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);
