Index: kernel/arch/ia32/src/bios/bios.c
===================================================================
--- kernel/arch/ia32/src/bios/bios.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/bios/bios.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -36,5 +36,5 @@
 #include <typedefs.h>
 
-#define BIOS_EBDA_PTR  0x40e
+#define BIOS_EBDA_PTR  0x40eU
 
 uintptr_t ebda = 0;
@@ -43,5 +43,5 @@
 {
 	/* Copy the EBDA address out from BIOS Data Area */
-	ebda = *((uint16_t *) BIOS_EBDA_PTR) * 0x10;
+	ebda = *((uint16_t *) BIOS_EBDA_PTR) * 0x10U;
 }
 
Index: kernel/arch/ia32/src/boot/memmap.c
===================================================================
--- kernel/arch/ia32/src/boot/memmap.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/boot/memmap.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -35,5 +35,5 @@
 #include <arch/boot/memmap.h>
 
-uint8_t e820counter = 0xff;
+uint8_t e820counter = 0xffU;
 e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS];
 
Index: kernel/arch/ia32/src/cpu/cpu.c
===================================================================
--- kernel/arch/ia32/src/cpu/cpu.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/cpu/cpu.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -49,11 +49,11 @@
  * Contains only non-MP-Specification specific SMP code.
  */
-#define AMD_CPUID_EBX  0x68747541
-#define AMD_CPUID_ECX  0x444d4163
-#define AMD_CPUID_EDX  0x69746e65
+#define AMD_CPUID_EBX  UINT32_C(0x68747541)
+#define AMD_CPUID_ECX  UINT32_C(0x444d4163)
+#define AMD_CPUID_EDX  UINT32_C(0x69746e65)
 
-#define INTEL_CPUID_EBX  0x756e6547
-#define INTEL_CPUID_ECX  0x6c65746e
-#define INTEL_CPUID_EDX  0x49656e69
+#define INTEL_CPUID_EBX  UINT32_C(0x756e6547)
+#define INTEL_CPUID_ECX  UINT32_C(0x6c65746e)
+#define INTEL_CPUID_EDX  UINT32_C(0x49656e69)
 
 
@@ -140,19 +140,19 @@
 		if ((info.cpuid_ebx == AMD_CPUID_EBX)
 		    && (info.cpuid_ecx == AMD_CPUID_ECX)
-			&& (info.cpuid_edx == AMD_CPUID_EDX))
+		    && (info.cpuid_edx == AMD_CPUID_EDX))
 			CPU->arch.vendor = VendorAMD;
 		
 		/*
 		 * Check for Intel processor.
-		 */		
+		 */
 		if ((info.cpuid_ebx == INTEL_CPUID_EBX)
 		    && (info.cpuid_ecx == INTEL_CPUID_ECX)
-			&& (info.cpuid_edx == INTEL_CPUID_EDX))
+		    && (info.cpuid_edx == INTEL_CPUID_EDX))
 			CPU->arch.vendor = VendorIntel;
 		
 		cpuid(INTEL_CPUID_STANDARD, &info);
-		CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
-		CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
-		CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f;						
+		CPU->arch.family = (info.cpuid_eax >> 8) & 0x0fU;
+		CPU->arch.model = (info.cpuid_eax >> 4) & 0x0fU;
+		CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0fU;
 	}
 }
Index: kernel/arch/ia32/src/debug/stacktrace.c
===================================================================
--- kernel/arch/ia32/src/debug/stacktrace.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/debug/stacktrace.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -37,6 +37,6 @@
 #include <typedefs.h>
 
-#define FRAME_OFFSET_FP_PREV	0
-#define FRAME_OFFSET_RA		1
+#define FRAME_OFFSET_FP_PREV  0
+#define FRAME_OFFSET_RA       1
 
 bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx)
Index: kernel/arch/ia32/src/drivers/i8254.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8254.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/drivers/i8254.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -54,6 +54,6 @@
 #include <ddi/device.h>
 
-#define CLK_PORT1  ((ioport8_t *) 0x40)
-#define CLK_PORT4  ((ioport8_t *) 0x43)
+#define CLK_PORT1  ((ioport8_t *) 0x40U)
+#define CLK_PORT4  ((ioport8_t *) 0x43U)
 
 #define CLK_CONST     1193180
Index: kernel/arch/ia32/src/drivers/i8259.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8259.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/drivers/i8259.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -121,6 +121,6 @@
 void pic_eoi(void)
 {
-	pio_write_8((ioport8_t *)0x20, 0x20);
-	pio_write_8((ioport8_t *)0xa0, 0x20);
+	pio_write_8((ioport8_t *) 0x20, 0x20);
+	pio_write_8((ioport8_t *) 0xa0, 0x20);
 }
 
Index: kernel/arch/ia32/src/drivers/vesa.c
===================================================================
--- kernel/arch/ia32/src/drivers/vesa.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/drivers/vesa.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -70,5 +70,5 @@
 bool vesa_init(void)
 {
-	if ((vesa_width == 0xffff) || (vesa_height == 0xffff))
+	if ((vesa_width == 0xffffU) || (vesa_height == 0xffffU))
 		return false;
 	
Index: kernel/arch/ia32/src/mm/frame.c
===================================================================
--- kernel/arch/ia32/src/mm/frame.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/mm/frame.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -44,9 +44,8 @@
 #include <align.h>
 #include <macros.h>
-
 #include <print.h>
 
-#define PHYSMEM_LIMIT32  0x07c000000ull
-#define PHYSMEM_LIMIT64  0x200000000ull
+#define PHYSMEM_LIMIT32  UINT64_C(0x07c000000)
+#define PHYSMEM_LIMIT64  UINT64_C(0x200000000)
 
 size_t hardcoded_unmapped_ktext_size = 0;
Index: kernel/arch/ia32/src/smp/apic.c
===================================================================
--- kernel/arch/ia32/src/smp/apic.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/smp/apic.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -72,6 +72,6 @@
  *
  */
-volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
-volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
+volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
+volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
 
 uint32_t apic_id_mask = 0;
@@ -184,5 +184,5 @@
 	 * Other interrupts will be forwarded to the lowest priority CPU.
 	 */
-	io_apic_disable_irqs(0xffff);
+	io_apic_disable_irqs(0xffffU);
 	
 	irq_initialize(&l_apic_timer_irq);
Index: kernel/arch/ia32/src/smp/mps.c
===================================================================
--- kernel/arch/ia32/src/smp/mps.c	(revision e9e5b9ab0ff1b3bcb98d019c57dddaee8b071601)
+++ kernel/arch/ia32/src/smp/mps.c	(revision dc0b96419120ee5e704d73292cca782d65f45781)
@@ -52,6 +52,6 @@
  */
 
-#define FS_SIGNATURE  0x5f504d5f
-#define CT_SIGNATURE  0x504d4350
+#define FS_SIGNATURE  UINT32_C(0x5f504d5f)
+#define CT_SIGNATURE  UINT32_C(0x504d4350)
 
 static struct mps_fs *fs;