Changes in kernel/arch/ia32/include/mm/page.h [0eef314:dc0b964] in mainline

File:

• kernel/arch/ia32/include/mm/page.h (modified) (10 diffs)

kernel/arch/ia32/include/mm/page.h

@@ -27 +27 @@
  */
 
-/** @addtogroup ia32mm  
+/** @addtogroup ia32mm
  * @{
  */
@@ -37 +37 @@
 
 #include <arch/mm/frame.h>
-
-#define PAGE_WIDTH      FRAME_WIDTH
-#define PAGE_SIZE       FRAME_SIZE
+#include <trace.h>
+
+#define PAGE_WIDTH  FRAME_WIDTH
+#define PAGE_SIZE   FRAME_SIZE
 
 #ifdef KERNEL
 
 #ifndef __ASM__
-#       define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
-#       define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
-#else
-#       define KA2PA(x) ((x) - 0x80000000)
-#       define PA2KA(x) ((x) + 0x80000000)
-#endif
+
+#define KA2PA(x)  (((uintptr_t) (x)) - UINT32_C(0x80000000))
+#define PA2KA(x)  (((uintptr_t) (x)) + UINT32_C(0x80000000))
+
+#else /* __ASM__ */
+
+#define KA2PA(x)  ((x) - 0x80000000)
+#define PA2KA(x)  ((x) + 0x80000000)
+
+#endif /* __ASM__ */
 
 /*
@@ -57 +62 @@
 
 /* Number of entries in each level. */
-#define PTL0_ENTRIES_ARCH       1024
-#define PTL1_ENTRIES_ARCH       0
-#define PTL2_ENTRIES_ARCH       0
-#define PTL3_ENTRIES_ARCH       1024
+#define PTL0_ENTRIES_ARCH  1024
+#define PTL1_ENTRIES_ARCH  0
+#define PTL2_ENTRIES_ARCH  0
+#define PTL3_ENTRIES_ARCH  1024
 
 /* Page table sizes for each level. */
-#define PTL0_SIZE_ARCH          ONE_FRAME
-#define PTL1_SIZE_ARCH          0
-#define PTL2_SIZE_ARCH          0
-#define PTL3_SIZE_ARCH          ONE_FRAME
+#define PTL0_SIZE_ARCH  ONE_FRAME
+#define PTL1_SIZE_ARCH  0
+#define PTL2_SIZE_ARCH  0
+#define PTL3_SIZE_ARCH  ONE_FRAME
 
 /* Macros calculating indices for each level. */
-#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
-#define PTL1_INDEX_ARCH(vaddr)  0
-#define PTL2_INDEX_ARCH(vaddr)  0
-#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
+#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ffU)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ffU)
 
 /* Get PTE address accessors for each level. */
@@ -105 +110 @@
 
 /* Set PTE flags accessors for each level. */
-#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
+#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
         set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
@@ -121 +126 @@
 #define PTE_WRITABLE_ARCH(p) \
         ((p)->writeable != 0)
-#define PTE_EXECUTABLE_ARCH(p)                  1
+#define PTE_EXECUTABLE_ARCH(p)  1
 
 #ifndef __ASM__
@@ -127 +132 @@
 #include <mm/mm.h>
 #include <arch/interrupt.h>
-#include <arch/types.h>
 #include <typedefs.h>
 
@@ -144 +148 @@
 
 /** When bit on this position is 1, a reserved bit was set in page directory. */ 
-#define PFERR_CODE_RSVD         (1 << 3)        
+#define PFERR_CODE_RSVD         (1 << 3)
 
 /** Page Table Entry. */
@@ -162 +166 @@
 } __attribute__ ((packed)) pte_t;
 
-static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
+NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
 {
         pte_t *p = &pt[i];
@@ -175 +179 @@
 }
 
-static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
+NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
 {
         pte_t *p = &pt[i];
@@ -193 +197 @@
 
 extern void page_arch_init(void);
-extern void page_fault(int n, istate_t *istate);
+extern void page_fault(unsigned int, istate_t *);
 
 #endif /* __ASM__ */