Index: arch/ia64/src/cpu/cpu.c
===================================================================
--- arch/ia64/src/cpu/cpu.c	(revision bc1089a990e7d6d859d96cf4f71e6bc8e2a039ad)
+++ arch/ia64/src/cpu/cpu.c	(revision da7d77077456ab35a65d42080d3cfbd4dafaa60a)
@@ -15,17 +15,17 @@
 
     int *p=&IVT;
-    
     volatile __u64 hlp,hlp2;
 
 
     int psr = 0x2000;
+    
 
 	__asm__  volatile (
-		"mov r15 = %0;;"
-		"mov cr2 = r15;;"
-		"mov psr.l = %1;;"
+		"mov cr2 = %0;;\n"
+		"mov psr.l = %1;;\n"
+		"srlz.i;"
+		"srlz.d;;"
 		: 
 		: "r" (p), "r" (psr)
-		: "r15"
 	);
 
@@ -33,5 +33,8 @@
 
 	/*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/
-	__asm__ volatile ("bsw.1;;");             
+	__asm__ volatile 
+	(
+	    "bsw.1;;\n"
+	);             
 	
 
Index: arch/ia64/src/start.S
===================================================================
--- arch/ia64/src/start.S	(revision bc1089a990e7d6d859d96cf4f71e6bc8e2a039ad)
+++ arch/ia64/src/start.S	(revision da7d77077456ab35a65d42080d3cfbd4dafaa60a)
@@ -35,5 +35,7 @@
 	.auto
 	# initialize PSR
-	mov psr.l = r0
+	mov psr.l = r0;;
+	srlz.i;
+	srlz.d;;
 	
 	# initialize register stack