Index: uspace/lib/libc/arch/amd64/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/amd64/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/amd64/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -37,4 +37,8 @@
 #ifndef LIBC_amd64_ATOMIC_H_
 #define LIBC_amd64_ATOMIC_H_
+
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 
 static inline void atomic_inc(atomic_t *val) {
Index: uspace/lib/libc/arch/arm32/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/arm32/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/arm32/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -37,4 +37,50 @@
 #define LIBC_arm32_ATOMIC_H_
 
+#define LIBC_ARCH_ATOMIC_H_
+#define CAS 
+
+#include <atomicdflt.h>
+#include <bool.h>
+#include <sys/types.h>
+
+extern uintptr_t *ras_page;
+
+static inline bool cas(atomic_t *val, long ov, long nv)
+{
+	long ret = 0;
+
+	/*
+	 * The following instructions between labels 1 and 2 constitute a
+	 * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
+	 * the kernel will restart it.
+	 */
+	asm volatile (
+		"1:\n"
+		"	adr %[ret], 1b\n"
+		"	str %[ret], %[rp0]\n"
+		"	adr %[ret], 2f\n"
+		"	str %[ret], %[rp1]\n"
+		"	ldr %[ret], %[addr]\n"
+		"	cmp %[ret], %[ov]\n"
+		"	streq %[nv], %[addr]\n"
+		"2:\n"
+		"	moveq %[ret], #1\n"
+		"	movne %[ret], #0\n"
+		: [ret] "+&r" (ret),
+		  [rp0] "=m" (ras_page[0]),
+		  [rp1] "=m" (ras_page[1]),
+		  [addr] "+m" (val->count)
+		: [ov] "r" (ov),
+		  [nv] "r" (nv)
+		: "memory"
+	);
+
+	ras_page[0] = 0;
+	asm volatile ("" ::: "memory");	
+	ras_page[1] = 0xffffffff;
+
+	return (bool) ret;
+}
+
 /** Atomic addition.
  *
@@ -46,20 +92,31 @@
 static inline long atomic_add(atomic_t *val, int i)
 {
-	int ret;
-	volatile long * mem = &(val->count);
+	long ret = 0;
 
+	/*
+	 * The following instructions between labels 1 and 2 constitute a
+	 * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
+	 * the kernel will restart it.
+	 */
 	asm volatile (
-	"1:\n"
-		"ldr r2, [%1]\n"
-		"add r3, r2, %2\n"
-		"str r3, %0\n"
-		"swp r3, r3, [%1]\n"
-		"cmp r3, r2\n"
-		"bne 1b\n"
+		"1:\n"
+		"	adr %[ret], 1b\n"
+		"	str %[ret], %[rp0]\n"
+		"	adr %[ret], 2f\n"
+		"	str %[ret], %[rp1]\n"
+		"	ldr %[ret], %[addr]\n"
+		"	add %[ret], %[ret], %[imm]\n"
+		"	str %[ret], %[addr]\n"
+		"2:\n"
+		: [ret] "+&r" (ret),
+		  [rp0] "=m" (ras_page[0]),
+		  [rp1] "=m" (ras_page[1]),
+		  [addr] "+m" (val->count)
+		: [imm] "r" (i)
+	);
 
-		: "=m" (ret)
-		: "r" (mem), "r" (i)
-		: "r3", "r2"
-	);
+	ras_page[0] = 0;
+	asm volatile ("" ::: "memory");	
+	ras_page[1] = 0xffffffff;
 
 	return ret;
Index: uspace/lib/libc/arch/arm32/src/entry.s
===================================================================
--- uspace/lib/libc/arch/arm32/src/entry.s	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/arm32/src/entry.s	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -36,6 +36,11 @@
 #
 # r1 contains the PCB pointer
+# r2 contains the RAS page address
 #
 __entry:
+	# Store the RAS page address into the ras_page variable
+	ldr r0, =ras_page
+	str r2, [r0]
+
 	# Pass pcb_ptr to __main as the first argument (in r0)
 	mov r0, r1
@@ -43,2 +48,9 @@
 
 	bl __exit
+
+.data
+
+.global ras_page
+ras_page:
+	.long 0
+
Index: uspace/lib/libc/arch/arm32/src/syscall.c
===================================================================
--- uspace/lib/libc/arch/arm32/src/syscall.c	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/arm32/src/syscall.c	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -60,6 +60,7 @@
 	register sysarg_t __arm_reg_r5 asm("r5") = p6;
 	register sysarg_t __arm_reg_r6 asm("r6") = id;
-
-	asm volatile ( "swi"
+	
+	asm volatile (
+		"swi 0"
 		: "=r" (__arm_reg_r0)
 		: "r" (__arm_reg_r0),
@@ -71,5 +72,5 @@
 		  "r" (__arm_reg_r6)
 	);
-
+	
 	return __arm_reg_r0;
 }
Index: uspace/lib/libc/arch/ia32/Makefile.inc
===================================================================
--- uspace/lib/libc/arch/ia32/Makefile.inc	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/ia32/Makefile.inc	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -39,4 +39,5 @@
 	arch/$(UARCH)/src/setjmp.S
 
+GCC_CFLAGS += -march=pentium
 LFLAGS += -N
 
Index: uspace/lib/libc/arch/ia32/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/ia32/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/ia32/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -35,4 +35,8 @@
 #ifndef LIBC_ia32_ATOMIC_H_
 #define LIBC_ia32_ATOMIC_H_
+
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 
 static inline void atomic_inc(atomic_t *val) {
Index: uspace/lib/libc/arch/ia64/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/ia64/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/ia64/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -35,4 +35,8 @@
 #ifndef LIBC_ia64_ATOMIC_H_
 #define LIBC_ia64_ATOMIC_H_
+
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 
 static inline void atomic_inc(atomic_t *val)
Index: uspace/lib/libc/arch/mips32/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/mips32/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/mips32/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -36,4 +36,8 @@
 #ifndef LIBC_mips32_ATOMIC_H_
 #define LIBC_mips32_ATOMIC_H_
+
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 
 #define atomic_inc(x)	((void) atomic_add(x, 1))
Index: uspace/lib/libc/arch/ppc32/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/ppc32/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/ppc32/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -35,4 +35,8 @@
 #ifndef LIBC_ppc32_ATOMIC_H_
 #define LIBC_ppc32_ATOMIC_H_
+
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 
 static inline void atomic_inc(atomic_t *val)
Index: uspace/lib/libc/arch/sparc64/include/atomic.h
===================================================================
--- uspace/lib/libc/arch/sparc64/include/atomic.h	(revision 245e8399f3d58ad45fc1730f6b948b33ae3ab8df)
+++ uspace/lib/libc/arch/sparc64/include/atomic.h	(revision d91a20c228b515bdb7e425b9da4663b50bd0a2b9)
@@ -36,4 +36,7 @@
 #define LIBC_sparc64_ATOMIC_H_
 
+#define LIBC_ARCH_ATOMIC_H_
+
+#include <atomicdflt.h>
 #include <sys/types.h>