Changeset d6f9fff in mainline for uspace

Timestamp:

2016-04-27T12:39:14Z (9 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1a5eca4

Parents:

8a36bc1e

Message:

ia32: Make TLS settable from uspace

The TLS document[1] mandates that %gs[0] is the thread pointer on ia32.
That is good as it allows userspace-only TLS management for fibrils:
fibril_save/restore() simply manipulate the thread pointer in %gs:0 and
don't need to ask the kernel to modify %gs's base. The kernel treats
%gs:0 as another preserved register and preserves it across context
switches. GCC gets in the way a little bit because it by default assumes
that TLS is accessible from negative %gs offsets (which would
necessitate a kernel-assisted solution). Fortunately, there is a GCC
option to suppress this assumption.

• Introduce the concept of virtual registers, with VREG_TP (thread pointer) being the first of them
• Preserve VREG_TP in context_save/restore()
• Stop using sys_tls_set() in favour of using %gs:0 as the thread pointer
• Make GCC generate code that always goes through %gs:0 to access TLS

[1] Drepper, U.: ELF Handling For Thread-Local Storage

Location:

uspace/lib/c/arch/ia32

Files:

• Makefile.common (modified) (1 diff)
• include/libarch/tls.h (modified) (2 diffs)
• src/fibril.S (modified) (1 diff)

uspace/lib/c/arch/ia32/Makefile.common

@@ -28 +28 @@
 
 ifeq ($(PROCESSOR),i486)
-        GCC_CFLAGS += -march=i486 -fno-omit-frame-pointer
+        GCC_CFLAGS += -march=i486 -mno-tls-direct-seg-refs -fno-omit-frame-pointer
 else
-        GCC_CFLAGS += -march=pentium -fno-omit-frame-pointer
+        GCC_CFLAGS += -march=pentium -mno-tls-direct-seg-refs -fno-omit-frame-pointer
 endif
 

uspace/lib/c/arch/ia32/include/libarch/tls.h

@@ -47 +47 @@
 static inline void __tcb_set(tcb_t *tcb)
 {
-        __SYSCALL1(SYS_TLS_SET, (sysarg_t) tcb);
+        asm volatile ("movl %0, %%gs:0" :: "r" (tcb));
 }
 
@@ -54 +54 @@
         void *retval;
         
-        asm (
-                "movl %%gs:0, %0"
-                : "=r" (retval)
-        );
+        asm volatile ("movl %%gs:0, %0" : "=r" (retval));
         
         return retval;

uspace/lib/c/arch/ia32/src/fibril.S

@@ -77 +77 @@
         
         # set thread local storage
-        pushl %edx
         movl CONTEXT_OFFSET_TLS(%eax), %edx     # Set arg1 to TLS addr
-        movl $1, %eax                           # Syscall SYS_TLS_SET
-        int $0x30
-        popl %edx
+        movl %edx, %gs:0
         
         xorl %eax, %eax         # context_restore returns 0