Changeset d6b81941 in mainline for kernel/arch/ia64/src/mm/tlb.c

Timestamp:

2011-03-29T21:59:55Z (14 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

563b538, ad7a6c9

Parents:

ebebd38 (diff), 3abfe9a8 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge toolchain upgrade and related changes. Highlights:

• GCC 4.6, binutils 2.21
• change the default CROSS_PREFIX to /usr/local/cross to avoid ugly pollution in the /usr/local directory (closes #252)
• amd64: use a silly workaround to avoid possible GCC 4.6 bug (going to report to GCC's bugzilla)
• toolchain.sh now supports parallel toolchain build (i.e. all targets at once)
• improve linker scripts to support the newest compiler input sections
• remove unused variables and other various fixes for GCC 4.6 warnings (GCC 4.5.1 also passes compilation)
• unification of kernel memcpy() and memstr() functions (use compiler builtins whenever possible, keep plain C fallback implementations in a sepearate object file)

File:

• kernel/arch/ia64/src/mm/tlb.c (modified) (6 diffs)

kernel/arch/ia64/src/mm/tlb.c

@@ -475 +475 @@
 void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa; /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         page_table_lock(AS, true);
@@ -649 +645 @@
 void data_dirty_bit_fault(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa;  /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         page_table_lock(AS, true);
@@ -686 +678 @@
 void instruction_access_bit_fault(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa;  /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         page_table_lock(AS, true);
@@ -723 +711 @@
 void data_access_bit_fault(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa;  /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         page_table_lock(AS, true);
@@ -760 +744 @@
 void data_access_rights_fault(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa;  /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         /*
@@ -792 +772 @@
 void page_not_present(uint64_t vector, istate_t *istate)
 {
-        region_register_t rr;
-        rid_t rid;
         uintptr_t va;
         pte_t *t;
         
         va = istate->cr_ifa;  /* faulting address */
-        rr.word = rr_read(VA2VRN(va));
-        rid = rr.map.rid;
         
         page_table_lock(AS, true);