Index: kernel/arch/riscv64/include/arch/asm.h
===================================================================
--- kernel/arch/riscv64/include/arch/asm.h	(revision 219c5302a8e32d74160ae65c1fbfa490273226d9)
+++ kernel/arch/riscv64/include/arch/asm.h	(revision d5e5fd1214ee9617b9a936d6f09efec4c9a91b48)
@@ -45,10 +45,10 @@
 {
 	ipl_t ipl;
-	
+
 	asm volatile (
 		"csrrsi %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n"
 		: [ipl] "=r" (ipl)
 	);
-	
+
 	return ipl;
 }
@@ -57,10 +57,10 @@
 {
 	ipl_t ipl;
-	
+
 	asm volatile (
 		"csrrci %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n"
 		: [ipl] "=r" (ipl)
 	);
-	
+
 	return ipl;
 }
@@ -77,10 +77,10 @@
 {
 	ipl_t ipl;
-	
+
 	asm volatile (
 		"csrr %[ipl], sstatus\n"
 		: [ipl] "=r" (ipl)
 	);
-	
+
 	return ipl;
 }
@@ -94,5 +94,5 @@
 {
 	uintptr_t base;
-	
+
 	asm volatile (
 		"and %[base], sp, %[mask]\n"
@@ -100,5 +100,5 @@
 		: [mask] "r" (~(STACK_SIZE - 1))
 	);
-	
+
 	return base;
 }
Index: kernel/arch/riscv64/include/arch/atomic.h
===================================================================
--- kernel/arch/riscv64/include/arch/atomic.h	(revision 219c5302a8e32d74160ae65c1fbfa490273226d9)
+++ kernel/arch/riscv64/include/arch/atomic.h	(revision d5e5fd1214ee9617b9a936d6f09efec4c9a91b48)
@@ -59,5 +59,5 @@
 {
 	atomic_count_t orig;
-	
+
 	asm volatile (
 		"amoadd.d %[orig], %[inc], %[addr]\n"
@@ -65,5 +65,5 @@
 		: [inc] "r" (1)
 	);
-	
+
 	return orig;
 }
@@ -72,5 +72,5 @@
 {
 	atomic_count_t orig;
-	
+
 	asm volatile (
 		"amoadd.d %[orig], %[inc], %[addr]\n"
@@ -78,5 +78,5 @@
 		: [inc] "r" (-1)
 	);
-	
+
 	return orig;
 }
@@ -85,5 +85,5 @@
 {
 	atomic_count_t orig;
-	
+
 	asm volatile (
 		"amoadd.d %[orig], %[inc], %[addr]\n"
@@ -91,5 +91,5 @@
 		: [inc] "r" (1)
 	);
-	
+
 	return orig - 1;
 }
@@ -98,5 +98,5 @@
 {
 	atomic_count_t orig;
-	
+
 	asm volatile (
 		"amoadd.d %[orig], %[inc], %[addr]\n"
@@ -104,5 +104,5 @@
 		: [inc] "r" (-1)
 	);
-	
+
 	return orig + 1;
 }
Index: kernel/arch/riscv64/include/arch/cycle.h
===================================================================
--- kernel/arch/riscv64/include/arch/cycle.h	(revision 219c5302a8e32d74160ae65c1fbfa490273226d9)
+++ kernel/arch/riscv64/include/arch/cycle.h	(revision d5e5fd1214ee9617b9a936d6f09efec4c9a91b48)
@@ -41,10 +41,10 @@
 {
 	uint64_t cycle;
-	
+
 	asm volatile (
 		"rdcycle %[cycle]\n"
 		: [cycle] "=r" (cycle)
 	);
-	
+
 	return cycle;
 }
Index: kernel/arch/riscv64/include/arch/mm/page.h
===================================================================
--- kernel/arch/riscv64/include/arch/mm/page.h	(revision 219c5302a8e32d74160ae65c1fbfa490273226d9)
+++ kernel/arch/riscv64/include/arch/mm/page.h	(revision d5e5fd1214ee9617b9a936d6f09efec4c9a91b48)
@@ -182,5 +182,5 @@
 {
 	pte_t *entry = &pt[i];
-	
+
 	return (((!entry->valid) << PAGE_PRESENT_SHIFT) |
 	    (entry->user << PAGE_USER_SHIFT) |
@@ -194,5 +194,5 @@
 {
 	pte_t *entry = &pt[i];
-	
+
 	entry->valid = !(flags & PAGE_NOT_PRESENT);
 	entry->readable = (flags & PAGE_READ) != 0;